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1.发明授权Microcontroller having special mode enable detection circuitry and a method of operation therefore 失效具有特殊模式使能检测电路的微控制器及其操作方法
公开(公告)号：US5991910A
公开(公告)日：1999-11-23
申请号：US960636
申请日：1997-10-29
申请人： Richard L. Hull , Scott Ellison , Paul Hofhine
发明人： Richard L. Hull , Scott Ellison , Paul Hofhine
IPC分类号： G06F11/22 , G06F1/22 , G06F1/24 , H03K19/173 , G01R31/28
CPC分类号： H03K19/1732 , G06F1/22
摘要： A free-running microcontroller (i.e., one without any reset signal) is shown with special mode enable detect logic for placing the microcontroller into the test or special operations mode, without the benefit of a dedicated pin for such purposes. Rather, the instant invention implements the methodology of first applying a test voltage to indicate to the free-running microcontroller that the test mode is to be entered. Since the device has no reset signal to interrupt normal operation once it has begun, the test voltage is applied before the power supply V.sub.DD to ensure that the device enters test mode before it can enter normal operation.
摘要翻译： 具有独立运行的微控制器（即，没有任何复位信号的微控制器）被显示为具有专用模式使能检测逻辑，用于将微控制器放置在测试或特殊操作模式中，而无需为此目的而使用专用引脚。 相反，本发明实现了首先施加测试电压以向自由运行的微控制器指示要输入测试模式的方法。 由于器件一旦开始就没有复位信号中断正常工作，所以在电源VDD之前施加测试电压，以确保器件在进入正常工作之前进入测试模式。
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2.发明授权Integrated circuit pins configurable as a clock input pin and as a digital I/O pin or as a device reset pin and as a digital I/O pin and method therefor 失效集成电路引脚可配置为时钟输入引脚和数字I / O引脚或器件复位引脚和数字I / O引脚及其方法
公开(公告)号：US5686844A
公开(公告)日：1997-11-11
申请号：US644915
申请日：1996-05-24
IPC分类号： G11C16/06 , G06F15/78 , H03K19/0175
CPC分类号： H03K19/01759
摘要： The present invention relates to a configurable IC device pin. The IC device pin may be a device clock input pin or a digital I/O pin in one embodiment of the present invention, or a reset pin or a digital I/O pin in another embodiment of the present invention. Both embodiments of the present invention use a memory device to store information to configure the IC device pin. Input/Output logic is also used in both embodiments in order to transfer data to and from the IC device pin when the IC device pin is configured as a digital I/O pin.
摘要翻译： 本发明涉及可配置的IC器件引脚。 在本发明的另一实施例中，IC器件引脚可以是本发明的一个实施例中的器件时钟输入引脚或数字I / O引脚，或复位引脚或数字I / O引脚。 本发明的两个实施例使用存储器件来存储用于配置IC器件引脚的信息。 当IC器件引脚被配置为数字I / O引脚时，两个实施例中都使用输入/输出逻辑，以便将数据传送到IC器件引脚和从IC器件引脚传输数据。
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公开(公告)号：US5694067A
公开(公告)日：1997-12-02
申请号：US644918
申请日：1996-05-24
CPC分类号： G06F15/7814
摘要： The present invention relates to a microcontroller that may be configured to operate without the accompaniment of any external components. The microcontroller can function in a proper manner from the application of only power and signal lines with no external components required. The microcontroller has integrated internal reset and oscillator circuitry into the microcontroller. The microcontroller has also integrated simple external components such as current limiting resistors and pull u and pull down resistor into the microcontroller in order to avoid application specific external components.
摘要翻译： 本发明涉及一种微控制器，其可被配置为在没有任何外部部件的伴随的情况下运行。 微控制器可以以适当的方式运行，仅应用电源和信号线，无需外部元件。 微控制器将内部复位和振荡器电路集成到微控制器中。 微控制器还集成了简单的外部组件，例如限流电阻和拉u和下拉电阻到微控制器，以避免应用程序特定的外部组件。
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公开(公告)号：US5587866A
公开(公告)日：1996-12-24
申请号：US508332
申请日：1995-07-27
申请人： Randy L. Yach , Richard L. Hull
发明人： Randy L. Yach , Richard L. Hull
CPC分类号： H03K17/223 , G11C5/143 , H02H3/243 , H03K17/145 , H03K17/22
摘要： A power-on reset circuit (10) for resetting electronic circuitry to be monitored has been provided. The power-on reset circuit includes a trip point generator (12) including the worst case component (the component that requires the greatest power supply voltage to operate) within the electronic circuitry for setting the threshold voltage for taking the electronic circuitry out of reset such that if the worst case component is operative, it is guaranteed that all components are operative and, thus, the electronic circuitry can be taken out of reset. Moreover, because the threshold voltage is based upon the worst case component of the electronic circuitry, the threshold voltage of the trip point generator will adequately track the electronic circuitry over normal process and temperature variations. Additionally, the power-on reset circuit includes a noise filter (34) for placing the electronic circuitry back into reset if variations within the power supply voltage causes the power supply voltage level to fall below a predetermined threshold for at least a minimum period of time.
摘要翻译： 已经提供了用于复位要监视的电子电路的上电复位电路（10）。 上电复位电路包括一个跳变点发生器（12），该跳变点发生器（12）包括电子电路内的最差情况分量（需要最大电源电压来操作的部件），用于设置阈值电压以使电子电路不复位， 如果最坏情况下的组件可操作，则可以确保所有组件均可操作，从而可以将电子电路取出。 此外，由于阈值电压是基于电子电路的最坏情况分量，所以跳闸点发生器的阈值电压将在正常的工艺和温度变化之后充分跟踪电子电路。 此外，上电复位电路包括噪声滤波器（34），用于将电子电路放回复位，如果电源电压内的变化使得电源电压电平降至低于预定阈值至少最短时间段 。
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公开(公告)号：US5835410A
公开(公告)日：1998-11-10
申请号：US871340
申请日：1997-06-09
申请人： Randy L. Yach , Richard L. Hull
发明人： Randy L. Yach , Richard L. Hull
CPC分类号： G11C7/067
摘要： A self timed precharge sense amplifier for allowing high speed reading of a memory cell of a memory array. The self timed precharge sense amplifier uses a precharge device for generating an output voltage which is used to ramp up a voltage level of a column of the memory array where the memory cell is located. State control circuitry is coupled to the precharge device for activating and deactivating the precharge device. A sense amplifier is coupled to the precharge device and to the state control circuitry for monitoring the output voltage of the precharge device and for signalling the state control circuitry to deactivate the precharge device when the output voltage has reached a threshold voltage level set by the sense amplifier which is a minimum amount of voltage required to properly read the memory cell.
摘要翻译： 一种用于允许存储器阵列的存储单元的高速读取的自定时预充电读出放大器。 自定时预充电读出放大器使用预充电装置来产生用于使存储器单元所在的存储器阵列的列的电压电平升高的输出电压。 状态控制电路耦合到预充电装置，用于激活和去激活预充电装置。 感测放大器耦合到预充电装置和状态控制电路，用于监视预充电装置的输出电压，并且当输出电压达到由感测设定的阈值电压电平时，用于发信号通知状态控制电路去激活预充电装置 放大器，其是正确读取存储器单元所需的最小电压量。
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公开(公告)号：US5815445A
公开(公告)日：1998-09-29
申请号：US866359
申请日：1997-05-30
申请人： Richard L. Hull , Randy L. Yach
发明人： Richard L. Hull , Randy L. Yach
摘要： A voltage regulator which will clamp the row voltage of a memory cell or array. The voltage regulator will clamp to a value which is greater than the erased threshold voltage of the memory cell and less than the worst case programmed threshold voltage of the memory cell. The voltage regulator uses an unprogrammed memory cell of the memory array for allowing the row voltage outputted by the voltage regulator to be self-tracking over manufacturing process variations and ambient environmental influences. A switching circuit is coupled to the unprogrammed memory cell for clamping the row voltage outputted by said voltage regulator below the programmed threshold voltage level.
摘要翻译： 将钳位存储单元或阵列的行电压的电压调节器。 电压调节器将钳位到大于存储器单元的擦除阈值电压的值，并且小于存储器单元的最坏情况编程的阈值电压。 电压调节器使用存储器阵列的未编程的存储单元，以允许电压调节器输出的行电压自动跟踪制造工艺变化和环境环境影响。 开关电路耦合到未编程的存储单元，用于将由所述电压调节器输出的行电压钳位在编程的阈值电压电平以下。
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公开(公告)号：US5796312A
公开(公告)日：1998-08-18
申请号：US644914
申请日：1996-05-24
CPC分类号： H03K17/164 , G06F1/08 , G06F15/7814 , H03K3/0231 , Y02B60/1207 , Y02B60/1225
摘要： A microcontroller circuit having firmware selectable oscillator trimming includes, in combination, a microcontroller, an oscillator located within the microcontroller for providing a system clock signal for the microcontroller, and a memory portion for providing trimming data to the oscillator for trimming frequency of the system clock. The microcontroller circuit includes microcontroller logic which has the trimming data stored therein for transfer to the memory portion. Additionally, the microcontroller logic permits the user to alter the trimming data after it has been transferred to the memory portion, thereby permitting the user to alter the amount of modification of the system clock frequency from the amount associated with the trimming data.
摘要翻译： 具有固件可选择的振荡器微调的微控制器电路组合包括微控制器，位于微控制器内的振荡器，用于为微控制器提供系统时钟信号;以及存储器部分，用于向振荡器提供修整数据以调整系统时钟的频率 。 微控制器电路包括具有存储在其中以用于传送到存储器部分的修整数据的微控制器逻辑。 此外，微控制器逻辑允许用户在修剪数据被传送到存储器部分之后改变修改数据，从而允许用户从与修整数据相关联的量改变系统时钟频率的修改量。
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