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1.发明授权公开(公告)号：US08525710B1
公开(公告)日：2013-09-03
申请号：US12750973
申请日：2010-03-31
CPC分类号： H03M1/0607 , H03F3/45475 , H03F3/45968 , H03F2203/45522 , H03F2203/45528 , H03M1/66 , H03M3/50
摘要： An offset correction circuit removes DC offset from an analog audio output signal by comparing transitions of digital audio values to which the analog output signal is related to the output of a monitor that monitors the analog output signal. The monitor may be a zero-crossing detector and the transitions of the digital signal that are compared may be transitions of the most-significant bit (MSB) of the digital audio values. A filtering algorithm or filter circuit may be used to average a result of the comparison of the transitions, so that the offset is slowly and accurately removed. A chopped or autozero comparator may be used to further reduce error in the offset determination.
摘要翻译： 偏移校正电路通过比较模拟输出信号与监视模拟输出信号的监视器的输出相关的数字音频值的转换，从模拟音频输出信号中去除DC偏移。 监视器可以是过零检测器，并且被比较的数字信号的转变可以是数字音频值的最高有效位（MSB）的转换。 可以使用滤波算法或滤波器电路来平均转换的比较的结果，使得偏移被缓慢且精确地去除。 可以使用斩波或自动调零比较器来进一步减少偏移确定中的误差。
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2.发明授权Discrete-time delta-sigma modulator with improved anti-aliasing at lower quantization rates 有权离散时间Δ-Σ调制器，在较低量化速率下具有改进的抗锯齿公开(公告)号：US08130127B1
公开(公告)日：2012-03-06
申请号：US12827522
申请日：2010-06-30
IPC分类号： H03M3/00
摘要： A discrete time delta-sigma modulator circuit, which may be used to implement an analog-to-digital converter (ADC) provides improved anti-aliasing performance when lower quantization rates are selected, by maintaining the clocking rate of a first stage in the delta-sigma modulator loop filter at a rate higher than would ordinarily be selected for a lower quantization rate. To accomplish the anti-aliasing improvement, the ratio between the quantization rate and the clocking rate of the first integrator is reduced at the lower quantization rate, resulting in a first true alias image at a multiple of the quantization rate, permitting anti-aliasing filters to more effectively attenuate the alias image, and attenuating the images spaced at the quantization rate via the averaging operation of the first integrator.
摘要翻译： 可用于实现模数转换器（ADC）的离散时间Δ-Σ调制器电路通过将第一级的时钟速率保持在三角形（delta）中来提供较低量化速率时提供的改进的抗混叠性能 Σ调制器环路滤波器的速率高于通常为较低量化速率选择的速率。 为了实现抗锯齿改进，第一积分器的量化速率与时钟速率之间的比例以较低的量化速率降低，从而产生了以量化速率倍数的第一真实混叠图像，从而允许抗混叠滤波器 以更有效地衰减别名图像，并且通过第一积分器的平均化操作来衰减以量化速率间隔的图像。
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3.发明授权Delta-sigma analog-to-digital converter circuit having reduced sampled reference noise 有权具有降低的采样参考噪声的Δ-Σ模数转换器电路公开(公告)号：US07746257B2
公开(公告)日：2010-06-29
申请号：US12366214
申请日：2009-02-05
IPC分类号： H03M3/00
摘要： A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.
摘要翻译： Δ-Σ模数转换器（ADC）电路通过减少由参考开关电路采样的噪声和其他误差来提高性能。 仅当输入积分器上的电荷超过阈值时，参考开关网络间歇运行，从而防止输入积分器饱和，同时避免不必要地注入参考噪声。 ADC的输入可以是直接注入到积分器的求和节点中的电流，或者可以是通过另一个交换网络提供的电压。
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公开(公告)号：US08311243B2
公开(公告)日：2012-11-13
申请号：US11610496
申请日：2006-12-13
IPC分类号： H03F99/00
CPC分类号： H03G3/004 , H02M3/07 , H03F1/0227 , H03F1/025 , H03F3/183 , H03F2200/03 , H03F2200/211 , H03F2200/507 , H03G3/20 , H03G3/3031
摘要： An energy-efficient consumer device audio power output stage provides improved battery life and reduced power dissipation. A power supply having a selectable operating mode supplies the power supply rails to the power amplified output stage. The operating mode is controlled in conformity with the audio signal level, which may be determined from a volume control setting of the device and/or from a signal level detector that determines the amplitude of the signal being amplified. The power supply may be a charge pump in which the operating mode uses a capacitive divider to provide for selection of a power supply output voltage that is a rational fraction of the power supply output voltage in a full-voltage operating mode.
摘要翻译： 节能消费者设备音频功率输出级提供更好的电池寿命和更低的功耗。 具有可选操作模式的电源将电源轨提供给功率放大输出级。 操作模式根据音频信号电平进行控制，音频信号电平可以根据设备的音量控制设置和/或从确定被放大的信号的幅度的信号电平检测器确定。 电源可以是电荷泵，其中操作模式使用电容分压器来提供在全电压工作模式下选择作为电源输出电压的有效部分的电源输出电压。
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5.发明申请DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER CIRCUIT HAVING REDUCED SAMPLED REFERENCE NOISE 有权具有降低采样参考噪声的DELTA-SIGMA模拟到数字转换器电路公开(公告)号：US20090278720A1
公开(公告)日：2009-11-12
申请号：US12366214
申请日：2009-02-05
摘要： A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.
摘要翻译： Δ-Σ模数转换器（ADC）电路通过减少由参考开关电路采样的噪声和其他误差来提高性能。 仅当输入积分器上的电荷超过阈值时，参考开关网络间歇运行，从而防止输入积分器饱和，同时避免不必要地注入参考噪声。 ADC的输入可以是直接注入到积分器的求和节点中的电流，或者可以是通过另一个交换网络提供的电压。
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6.发明授权Method and apparatus for controlling a selectable voltage audio power output stage 有权用于控制可选择的电压音频功率输出级的方法和装置公开(公告)号：US08068622B2
公开(公告)日：2011-11-29
申请号：US11611069
申请日：2006-12-14
IPC分类号： H03F99/00
CPC分类号： H03F1/025
摘要： A method and apparatus for controlling a selectable voltage audio power output stage provides a mechanism for raising the selected power amplifier output voltage in time for the arrival of signal peaks to avoid clipping. Signal peaks may either be delayed by delaying an increase in volume control level or enabling signal compression for a predetermined time period, so that sufficient time is provided for the amplifier power supply to stabilize at a higher operating voltage when an increase of power supply voltage is selected. Alternatively, a signal level may be determined at an upstream source, such as a decoder or filter that provides information in sufficient advance of the arrival of the peaks, and used to control the power supply selection, so that the higher power supply voltage level is selected in advance of arrival of the signal peaks that would otherwise cause clipping at the power amplifier output.
摘要翻译： 用于控制可选择的电压音频功率输出级的方法和装置提供了用于在信号峰值到达时及时提升所选择的功率放大器输出电压以避免削波的机制。 信号峰值可以通过延迟音量控制电平的增加或在预定时间段内启用信号压缩来延迟，使得当电源电压的增加是放大器电源稳定在较高的工作电压时，提供足够的时间 选择。 或者，可以在诸如解码器或滤波器的上游源处确定信号电平，所述解码器或滤波器提供足够高的峰值到达之前的信息，并且用于控制电源选择，使得较高的电源电压电平为 在信号峰值的到达之前选择，否则将在功率放大器输出端造成限幅。
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公开(公告)号：US20080044041A1
公开(公告)日：2008-02-21
申请号：US11610496
申请日：2006-12-13
IPC分类号： H03F21/00
CPC分类号： H03G3/004 , H02M3/07 , H03F1/0227 , H03F1/025 , H03F3/183 , H03F2200/03 , H03F2200/211 , H03F2200/507 , H03G3/20 , H03G3/3031
摘要： An energy-efficient consumer device audio power output stage provides improved battery life and reduced power dissipation. A power supply having a selectable operating mode supplies the power supply rails to the power amplified output stage. The operating mode is controlled in conformity with the audio signal level, which may be determined from a volume control setting of the device and/or from a signal level detector that determines the amplitude of the signal being amplified. The power supply may be a charge pump in which the operating mode uses a capacitive divider to provide for selection of a power supply output voltage that is a rational fraction of the power supply output voltage in a full-voltage operating mode.
摘要翻译： 节能消费者设备音频功率输出级提供更好的电池寿命和更低的功耗。 具有可选操作模式的电源将电源轨提供给功率放大输出级。 操作模式根据音频信号电平进行控制，音频信号电平可以根据设备的音量控制设置和/或从确定被放大的信号的幅度的信号电平检测器确定。 电源可以是电荷泵，其中操作模式使用电容分压器来提供在全电压工作模式下选择作为电源输出电压的有效部分的电源输出电压。
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8.发明申请METHOD AND APPARATUS FOR CONTROLLING A SELECTABLE VOLTAGE AUDIO POWER OUTPUT STAGE 有权用于控制可选择的电压音频功率输出级的方法和装置公开(公告)号：US20080144861A1
公开(公告)日：2008-06-19
申请号：US11611069
申请日：2006-12-14
IPC分类号： H03F21/00
CPC分类号： H03F1/025
摘要： A method and apparatus for controlling a selectable voltage audio power output stage provides a mechanism for raising the selected power amplifier output voltage in time for the arrival of signal peaks to avoid clipping. Signal peaks may either be delayed by delaying an increase in volume control level or enabling signal compression for a predetermined time period, so that sufficient time is provided for the amplifier power supply to stabilize at a higher operating voltage when an increase of power supply voltage is selected. Alternatively, a signal level may be determined at an upstream source, such as a decoder or filter that provides information in sufficient advance of the arrival of the peaks, and used to control the power supply selection, so that the higher power supply voltage level is selected in advance of arrival of the signal peaks that would otherwise cause clipping at the power amplifier output.
摘要翻译： 用于控制可选择的电压音频功率输出级的方法和装置提供了用于在信号峰值到达时及时提升所选择的功率放大器输出电压以避免削波的机制。 信号峰值可以通过延迟音量控制电平的增加或在预定时间段内启用信号压缩来延迟，使得当电源电压的增加是放大器电源稳定在较高的工作电压时，提供足够的时间 选择。 或者，可以在诸如解码器或滤波器的上游源处确定信号电平，所述解码器或滤波器提供足够高的峰值到达之前的信息，并且用于控制电源选择，使得较高的电源电压电平为 在信号峰值的到达之前选择，否则将在功率放大器输出端造成限幅。
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公开(公告)号：US10263532B2
公开(公告)日：2019-04-16
申请号：US13077421
申请日：2011-03-31
申请人： John L. Melanson , Eric J. King
发明人： John L. Melanson , Eric J. King
摘要： An electronic system includes two power supplies to supply an operating voltage to a switching power converter. The first power supply, referred to as a start-up power supply, includes a first source follower transistor to conduct a start-up current for a controller and supply an operating voltage for the controller. The controller controls operation of the switching power converter. A second power supply, referred to as an auxiliary power supply, includes a second source follower transistor to conduct a steady-state operational current for the controller and supply an operating voltage for the controller. In at least one embodiment, once the second power supply begins supplying the operating voltage to the controller, the start-up power supply automatically ceases supplying the start-up current to the controller.
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10.发明授权Input voltage sensing for a switching power converter and a triac-based dimmer 有权开关电源转换器和基于triac的调光器的输入电压检测公开(公告)号：US09307601B2
公开(公告)日：2016-04-05
申请号：US13539004
申请日：2012-06-29
申请人： Zhaohui He , Rahul Singh , Eric J. King , John L. Melanson , William A. Draper
发明人： Zhaohui He , Rahul Singh , Eric J. King , John L. Melanson , William A. Draper
CPC分类号： H05B33/0848 , H05B33/0815 , Y02B20/346
摘要： An electronic lighting system and method described herein control energy provided to an electronic lighting device, such as one or more light-emitting diodes (LEDs) and/or compact fluorescent lamps (CFLs), of the electronic lighting system. A triac-based dimmer phase cuts a line voltage provided to the electronic lighting system. A controller of the electronic lighting system utilizes a probing system to overcome idiosyncrasies of the triac-based dimmer to allow the controller to probe and sense the line voltage. To reduce energy consumption, rather than probing each cycle of the output voltage of the triac-based dimmer, the controller periodically or intermittently probes the output voltage of the triac-based dimmer.
摘要翻译： 本文所述的电子照明系统和方法控制提供给诸如电子照明系统的一个或多个发光二极管（LED）和/或紧凑型荧光灯（CFL）的电子照明装置的能量。 三端双向可控硅开关控制器的调光器相位切断提供给电子照明系统的线路电压。 电子照明系统的控制器利用探测系统来克服基于triac的调光器的特性，以允许控制器探测和感测线路电压。 为了降低能耗，而不是探测基于三端双向可控硅的调光器的输出电压的每个周期，控制器周期性或间歇地探测基于三端双向可控硅的调光器的输出电压。
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