Fan-out semiconductor package
    1.
    发明授权

    公开(公告)号:US10304807B2

    公开(公告)日:2019-05-28

    申请号:US15951571

    申请日:2018-04-12

    摘要: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Fan-out semiconductor package
    3.
    发明授权

    公开(公告)号:US10157886B2

    公开(公告)日:2018-12-18

    申请号:US15437766

    申请日:2017-02-21

    摘要: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Fan-out semiconductor package
    4.
    发明授权

    公开(公告)号:US10121769B2

    公开(公告)日:2018-11-06

    申请号:US15437766

    申请日:2017-02-21

    摘要: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Substrate having electronic component embedded therein and method of manufacturing the same
    6.
    发明授权
    Substrate having electronic component embedded therein and method of manufacturing the same 有权
    具有嵌入电子部件的基板及其制造方法

    公开(公告)号:US09313893B2

    公开(公告)日:2016-04-12

    申请号:US14143616

    申请日:2013-12-30

    摘要: A substrate having an electronic component embedded therein includes a first insulating layer including a cavity and including first and second circuit patterns provided on upper and lower surfaces thereof, respectively; the electronic component at least partially inserted into the cavity and including an external electrode; a plurality of build-up insulating layers stacked on or beneath the first insulating layer; upper and lower circuit patterns formed on the build-up insulating layers, respectively; and a plurality of vias connecting the external electrode, the upper circuit pattern, the first circuit pattern, the second circuit pattern, and the lower circuit pattern.

    摘要翻译: 嵌入其中的电子部件的基板包括:第一绝缘层,包括空腔,并且分别包括设置在其上表面和下表面上的第一和第二电路图案; 所述电子部件至少部分地插入所述腔并包括外部电极; 堆叠在所述第一绝缘层上或下的多个积层绝缘层; 分别形成在积层绝缘层上的上下电路图案; 以及连接外部电极,上部电路图案,第一电路图案,第二电路图案和下部电路图案的多个通孔。

    Semiconductor package having through-hole including shielding wiring structure

    公开(公告)号:US11037884B2

    公开(公告)日:2021-06-15

    申请号:US16433439

    申请日:2019-06-06

    摘要: A semiconductor package includes: a frame having a first surface and a second surface opposing each other, and including a through-hole and a wiring structure connected to the first surface and the second surface; a connection structure disposed on the first surface of the frame and including a redistribution layer; a semiconductor chip disposed in the through-hole and including connection pads connected to the redistribution layer; an encapsulant encapsulating the semiconductor chip and covering the second surface of the frame; and a plurality of electrical connection metal members disposed on the second surface of the frame and connected to the wiring structure. The wiring structure includes a shielding wiring structure surrounding the through-hole, and the plurality of electrical connection metal members include a plurality of grounding electrical connection metal members connected to the shielding wiring structure.

    Fan-out semiconductor package and method of manufacturing the same

    公开(公告)号:US10262949B2

    公开(公告)日:2019-04-16

    申请号:US15944321

    申请日:2018-04-03

    摘要: The present disclosure relates to a fan-out semiconductor package and a method of manufacturing the same. The fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member includes a first insulating layer, a first redistribution layer and a second redistribution layer disposed on one surface and the other surface of the first insulating layer opposing the one surface thereof, respectively, a second insulating layer disposed on the first insulating layer and covering the first redistribution layer, and a third redistribution layer disposed on the second insulating layer. A fan-out semiconductor package may include one or more connection units instead of the first connection member.