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公开(公告)号：US20240234349A9
公开(公告)日：2024-07-11
申请号：US18234529
申请日：2023-08-16
发明人： GWANGJAE JEON , MINKI KIM , Hyungchul SHIN , WON IL LEE , HYUEKJAE LEE , Enbin JO
CPC分类号： H01L24/06 , H01L23/481 , H01L24/05 , H01L24/08 , H01L2224/05557 , H01L2224/0603 , H01L2224/06051 , H01L2224/06515 , H01L2224/08145
摘要： Disclosed is a semiconductor package comprising lower and upper structure. The lower structure includes a first semiconductor substrate, first through vias vertically penetrating the first semiconductor substrate, first signal pads connected to the first through vias, first dummy pads between the first signal pads and electrically separated from the first through vias, and a first dielectric layer surrounding the first signal pads and the first dummy pads. The upper structure includes a second semiconductor substrate, second signal pads and second dummy pads, and a second dielectric layer surrounding the second signal pads and the second dummy pads. The first signal pad is in contact with one of the second signal pads. The first dummy pad is in contact with one of the second dummy pads. A first interval between the first dummy pads is 0.5 to 1.5 times a second interval between the first signal pads.
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公开(公告)号：US20240136311A1
公开(公告)日：2024-04-25
申请号：US18234529
申请日：2023-08-15
发明人： GWANGJAE JEON , MINKI KIM , Hyungchul SHIN , WON IL LEE , HYUEKJAE LEE , Enbin JO
CPC分类号： H01L24/06 , H01L23/481 , H01L24/05 , H01L24/08 , H01L2224/05557 , H01L2224/0603 , H01L2224/06051 , H01L2224/06515 , H01L2224/08145
摘要： Disclosed is a semiconductor package comprising lower and upper structure. The lower structure includes a first semiconductor substrate, first through vias vertically penetrating the first semiconductor substrate, first signal pads connected to the first through vias, first dummy pads between the first signal pads and electrically separated from the first through vias, and a first dielectric layer surrounding the first signal pads and the first dummy pads. The upper structure includes a second semiconductor substrate, second signal pads and second dummy pads, and a second dielectric layer surrounding the second signal pads and the second dummy pads. The first signal pad is in contact with one of the second signal pads. The first dummy pad is in contact with one of the second dummy pads. A first interval between the first dummy pads is 0.5 to 1.5 times a second interval between the first signal pads.
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公开(公告)号：US20240258278A1
公开(公告)日：2024-08-01
申请号：US18500089
申请日：2023-11-01
发明人： Hyungchul SHIN , Won IL LEE , Hyuekjae LEE , Enbin JO
IPC分类号： H01L25/065 , H01L23/00 , H01L25/18 , H10B80/00
CPC分类号： H01L25/0657 , H01L24/05 , H01L24/06 , H01L24/08 , H01L25/18 , H10B80/00 , H01L24/13 , H01L24/16 , H01L2224/05552 , H01L2224/0557 , H01L2224/05647 , H01L2224/0603 , H01L2224/06181 , H01L2224/08145 , H01L2224/08225 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13117 , H01L2224/1312 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/16227 , H01L2225/06544 , H01L2225/06562 , H01L2225/06565 , H01L2924/01058 , H01L2924/1431 , H01L2924/1432 , H01L2924/1433
摘要： A semiconductor package includes a lower semiconductor chip, a first semiconductor chip, a first through-electrode vertically penetrating the first semiconductor substrate, a first upper pad connected to the first through electrode, a first circuit layer disposed on the lower surface of the first semiconductor substrate, and a first lower pad disposed on a lower surface of the first circuit layer. A second semiconductor chip includes a second through-electrode spaced apart from the first through-electrode and vertically penetrating the second semiconductor substrate. A second upper pad is connected to the second through electrode. A second circuit layer is disposed on the lower surface of the second semiconductor substrate, and a second lower pad is connected to the second through-electrode on the lower surface of the second circuit layer through the second circuit layer and is integrally formed with the first upper pad.
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