公开(公告)号：US12113110B2

公开(公告)日：2024-10-08

申请号：US17541735

申请日：2021-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woochul Jeon ,  Jongseob Kim ,  Jaejoon Oh ,  Younghwan Park

IPC: H01L29/423 ,  H01L27/098 ,  H01L29/20 ,  H01L29/808

CPC classification number: H01L29/42316 ,  H01L27/098 ,  H01L29/808 ,  H01L29/2003

Abstract: A nitride semiconductor device having a field effect gate is disclosed. The disclosed nitride semiconductor device includes a high-resistance material layer including a Group III-V compound semiconductor, a first channel control layer on the high-resistance material layer and including a Group III-V compound semiconductor of a first conductivity type, a channel layer on the channel layer control layer and including a nitride semiconductor of a second conductivity type opposite to the first conductivity type, and a gate electrode having a contact of an ohmic contact type with the first channel control layer.

公开(公告)号：US20180351224A1

公开(公告)日：2018-12-06

申请号：US15877562

申请日：2018-01-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeongsik Ko ,  Hyukjae Kwon ,  Jaejoon Oh

IPC: H01M12/06 ,  H01M10/617 ,  H01M10/654

Abstract: A metal-air battery apparatus includes a temperature controller for controlling temperatures of a positive electrode and a negative electrode. The temperature controller includes a monitoring unit that may be separated from the temperature controller. The temperature of at least one of the positive electrode and the negative electrode may be controlled by monitoring an internal condition of the metal-air battery apparatus.

公开(公告)号：US20250169123A1

公开(公告)日：2025-05-22

申请号：US18745665

申请日：2024-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong Seok Yang ,  Sanghyun Kim ,  Jongseob Kim ,  Joonyong Kim ,  Junhyuk Park ,  Jaejoon Oh ,  Jung-Wook Lee

IPC: H01L29/06 ,  H01L23/00 ,  H01L23/29 ,  H01L29/20 ,  H01L29/66 ,  H01L29/778

Abstract: The present disclosure relates to semiconductor devices. An example semiconductor device includes a channel layer, a barrier layer on the channel layer including a material having a different energy band gap than a material included in the channel layer, a gate electrode on the barrier layer, a gate semiconductor layer between the barrier layer and the gate electrode, a protection layer on the barrier layer and the gate electrode, a source electrode and a drain electrode on both sides of the gate electrode and extending through the protection layer to cover the side surfaces of the channel layer and the barrier layer, and a diffusion barrier layer within the protection layer covering the barrier layer and the gate electrode and including Nitrogen.

公开(公告)号：US11588046B2

公开(公告)日：2023-02-21

申请号：US17386729

申请日：2021-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongchul Shin ,  Boram Kim ,  Younghwan Park ,  Jongseob Kim ,  Joonyong Kim ,  Junhyuk Park ,  Jaejoon Oh ,  Minchul Yu ,  Soogine Chong ,  Sunkyu Hwang ,  Injun Hwang

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/20

Abstract: A high electron mobility transistor (HEMT) includes a channel layer, a plurality of barrier layers, and a p-type semiconductor layer. The barrier layers have an energy band gap greater than that of the channel layer. A gate electrode is arranged on the p-type semiconductor layer. A source electrode and a drain electrode are apart from the p-type semiconductor layer and the gate electrode on the barrier layers. Impurity concentrations of the barrier layers are different from each other in a drift area between the source electrode and the drain electrode.

公开(公告)号：US11335802B2

公开(公告)日：2022-05-17

申请号：US17016890

申请日：2020-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaejoon Oh ,  Jongseob Kim

IPC: H01L29/778 ,  H01L29/10 ,  H01L29/423 ,  H01L29/45 ,  H01L29/47 ,  H01L29/66 ,  H01L29/20 ,  H01L29/205

Abstract: Provided are a high electron mobility transistor and a method of manufacturing the high electron mobility transistor. The high electron mobility transistor includes a gate electrode provided on a depletion forming layer. The gate electrode includes a first gate electrode configured to form an ohmic contact with the depletion forming layer, and a second gate electrode configured to form a Schottky contact with the depletion forming layer.

公开(公告)号：US11757029B2

公开(公告)日：2023-09-12

申请号：US17719690

申请日：2022-04-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaejoon Oh ,  Jongseob Kim

IPC: H01L29/778 ,  H01L29/10 ,  H01L29/423 ,  H01L29/45 ,  H01L29/47 ,  H01L29/66 ,  H01L29/20 ,  H01L29/205

CPC classification number: H01L29/7787 ,  H01L29/10 ,  H01L29/42312 ,  H01L29/452 ,  H01L29/475 ,  H01L29/66462 ,  H01L29/2003 ,  H01L29/205

Abstract: Provided are a high electron mobility transistor and a method of manufacturing the high electron mobility transistor. The high electron mobility transistor includes a gate electrode provided on a depletion forming layer. The gate electrode includes a first gate electrode configured to form an ohmic contact with the depletion forming layer, and a second gate electrode configured to form a Schottky contact with the depletion forming layer.

公开(公告)号：US11728419B2

公开(公告)日：2023-08-15

申请号：US17082478

申请日：2020-10-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Injun Hwang ,  Jaejoon Oh ,  Soogine Chong ,  Jongseob Kim ,  Joonyong Kim ,  Junhyuk Park ,  Sunkyu Hwang

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/40 ,  H01L29/20

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66462

Abstract: A high electron mobility transistor (HEMT) includes a channel layer comprising a group III-V compound semiconductor; a barrier layer comprising the group III-V compound semiconductor on the channel layer; a gate electrode on the barrier layer; a source electrode over gate electrode; a drain electrode spaced apart from the source electrode; and a metal wiring layer. A same layer of the metal wiring layer includes a gate wiring connected to the gate electrode, a source field plate connected to the source electrode, and a drain field plate connected to the drain electrode.

公开(公告)号：US11581269B2

公开(公告)日：2023-02-14

申请号：US16868745

申请日：2020-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younghwan Park ,  Jongseob Kim ,  Joonyong Kim ,  Junhyuk Park ,  Dongchul Shin ,  Jaejoon Oh ,  Soogine Chong ,  Sunkyu Hwang ,  Injun Hwang

IPC: H01L23/00 ,  H01L29/15 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778

Abstract: A semiconductor thin film structure may include a substrate, a buffer layer on the substrate, and a semiconductor layer on the buffer layer, such that the buffer layer is between the semiconductor layer and the substrate. The buffer layer may include a plurality of unit layers. Each unit layer of the plurality of unit layers may include a first layer having first bandgap energy and a first thickness, a second layer having second bandgap energy and a second thickness, and a third layer having third bandgap energy and a third thickness. One layer having a lowest bandgap energy of the first, second, and third layers of the unit layer may be between another two layers of the first, second, and third layers of the unit layer.

公开(公告)号：US12288738B2

公开(公告)日：2025-04-29

申请号：US17227850

申请日：2021-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younghwan Park ,  Jongseob Kim ,  Jaejoon Oh ,  Soogine Chong ,  Sunkyu Hwang

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L29/20

Abstract: Provided are a semiconductor device package and/or a method of fabricating the semiconductor device package. The semiconductor device package may include a semiconductor device including a plurality of electrode pads on an upper surface of the semiconductor device, a lead frame including a plurality of conductive members bonded to the plurality of electrode pads, and a mold between the plurality of conductive members.

公开(公告)号：US12218233B2

公开(公告)日：2025-02-04

申请号：US17902383

申请日：2022-09-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaejoon Oh ,  Jongseob Kim

IPC: H01L29/778 ,  H01L21/285 ,  H01L29/20 ,  H01L29/205 ,  H01L29/423 ,  H01L29/66

Abstract: A high electron mobility transistor and a method of manufacturing the same are disclosed. The high electron mobility transistor includes a channel layer, a channel supplying layer causing generation of a two-dimensional electron gas (2DEG) in the channel layer, a source electrode and a drain electrode provided on respective sides of the channel supplying layer, a depletion forming layer provided on the channel supplying layer to form a depletion region in the 2DEG, a gate electrode provided on a portion of the depletion forming layer, and a current limiting layer provided to contact the gate electrode on another portion of the depletion forming layer. The current limiting layer limits a current flow from the gate electrode to the depletion forming layer according to a voltage applied to the gate electrode.