公开(公告)号：US09984757B2

公开(公告)日：2018-05-29

申请号：US15351576

申请日：2016-11-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-Ho Lee ,  Sil-Wan Chang ,  Hyun-Jin Choi ,  Dong-Hoon Ham

IPC: G11C16/26 ,  G11C5/14 ,  G11C16/04 ,  G11C16/30 ,  G11C16/34 ,  G11C11/56

CPC classification number: G11C16/26 ,  G11C5/144 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/30 ,  G11C16/3418

Abstract: An operating method of a memory controller, configured to control a non-volatile memory device that performs a refresh read operation, detects a power on state or power off state of the non-volatile memory device and issues a refresh read command. The non-volatile memory device that receives the refresh read command is controlled to perform, one time, the refresh read operation including a read operation on one of a plurality of word lines with respect to each of the plurality of memory blocks.

公开(公告)号：US20180081594A1

公开(公告)日：2018-03-22

申请号：US15605148

申请日：2017-05-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANG-WON JUNG ,  Yoon-Young Kyung ,  Hyun-Jin Choi ,  Ji-Soo Kim ,  Joon-Ho Lee ,  Walter Jun ,  Jae-Sung Jung ,  Jun-Seok Park ,  Young-Woo Jung

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0613 ,  G06F3/0673 ,  G06F13/00 ,  G06F2212/70 ,  G11C7/1084 ,  G11C7/22 ,  G11C11/5628 ,  G11C16/10 ,  G11C16/3495 ,  G11C2211/5641

Abstract: A method of operating a storage device including first and second memory regions includes adjusting a write ratio of the first memory region to the second memory region for write data received from a host in response to a write request from the host, and writing the write data to the first and second memory regions at the adjusted write ratio. The first memory region includes memory cells having a first write speed, and the second memory region includes memory cells having a second write speed that is different from the first write speed.

公开(公告)号：USD757061S1

公开(公告)日：2016-05-24

申请号：US29467232

申请日：2013-09-17

Applicant: Samsung Electronics Co., Ltd.

Designer： Joon-Ho Lee ,  Ye-Kyung Yoo ,  Yu-Kyung Lee ,  Seung-Hwa Jeong ,  Da-Nim Kang ,  Ji-Yoon Yoon

公开(公告)号：USD757060S1

公开(公告)日：2016-05-24

申请号：US29467209

申请日：2013-09-17

Applicant: Samsung Electronics Co., Ltd.

Designer： Joon-Ho Lee ,  Ye-Kyung Yoo ,  Yu-Kyung Lee ,  Seung-Hwa Jeong ,  Da-Nim Kang ,  Ji-Yoon Yoon

公开(公告)号：USD753160S1

公开(公告)日：2016-04-05

申请号：US29467214

申请日：2013-09-17

Applicant: Samsung Electronics Co., Ltd.

Designer： Joon-Ho Lee ,  Ye-Kyung Yoo ,  Yu-Kyung Lee ,  Seung-Hwa Jeong ,  Da-Nim Kang ,  Ji-Yoon Yoon

公开(公告)号：US09190155B2

公开(公告)日：2015-11-17

申请号：US14155960

申请日：2014-01-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-Ho Lee ,  Jong-Nam Baek ,  Dong-Hoon Ham ,  Sang-Wook Yoo ,  In-Tae Hwang

IPC: G11C16/06 ,  G11C16/16 ,  G11C16/04

CPC classification number: G11C16/16 ,  G11C16/0483

Abstract: A memory system includes a flash memory including a block having first sub-blocks and second sub-blocks different from each other, the second sub-blocks including free pages only; and a controller configured to erase the flash memory in units of the sub-blocks, and in a garbage collection operation, the controller is configured to copy data of a valid page of the first sub-blocks to at least one of the second sub-blocks.

Abstract translation: 存储器系统包括闪存，其包括具有彼此不同的第一子块和第二子块的块，第二子块仅包括空闲页; 以及控制器，被配置为以子块为单位擦除闪速存储器，并且在垃圾收集操作中，控制器被配置为将第一子块的有效页面的数据复制到第二子块中的至少一个， 块。

公开(公告)号：US10811381B2

公开(公告)日：2020-10-20

申请号：US16268651

申请日：2019-02-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-Ho Lee ,  Sung-Hyup Kim ,  Ki-Ju Sohn

IPC: H01L21/68 ,  H01L23/00 ,  H01L21/67 ,  H01J37/32 ,  H01L25/00 ,  H01L25/18 ,  H01L27/146 ,  H01L23/544 ,  H01L29/04 ,  H01L21/683

Abstract: A wafer to wafer bonding method includes performing a plasma process on a bonding surface of a first wafer, pressurizing the first wafer after performing the plasma process on the bonding surface of the first wafer, and bonding the first wafer to a second wafer. The plasma process has different plasma densities along a circumferential direction about a center of the first wafer. A middle portion of the first wafer protrudes after pressurizing the first wafer. The first wafer is bonded to the second wafer by gradually joining the first wafer to the second wafer from the middle portion of the first wafer to a peripheral region of the first wafer.

公开(公告)号：US09805799B2

公开(公告)日：2017-10-31

申请号：US13786501

申请日：2013-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-Ho Lee ,  Gwang-Ok Go ,  Kyung-Ho Shin ,  Mi-Hyang Lee

IPC: G06F12/00 ,  G11C16/10 ,  G06F12/02

CPC classification number: G11C16/10 ,  G06F12/0246 ,  G06F12/0253 ,  G06F2212/1036 ,  G06F2212/7205 ,  G06F2212/7208 ,  G11C11/5621 ,  G11C2207/2236 ,  G11C2211/5641

Abstract: A nonvolatile memory device includes a first area of single-level cells (SLCs) and a second area of multi-level cells (MLCs). The device determines whether a free block can be created by copying data between memory blocks of the first area. Upon determining that the free memory block can be created by copying data between the memory blocks of the first area, the device copies the data between the memory blocks of the first area to create the free memory block. Otherwise, the device selects at least one memory block from the first area and allocates the selected memory block as free memory block by copying the data stored in the selected memory block of the first area to the second area.

公开(公告)号：US09396107B2

公开(公告)日：2016-07-19

申请号：US14079661

申请日：2013-11-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-Ho Lee ,  Hyun-Seok Kim

IPC: G06F12/00 ,  G06F12/02 ,  G06F9/44 ,  G06F12/10

CPC classification number: G06F12/0246 ,  G06F9/4411 ,  G06F12/10 ,  G06F12/1009 ,  G06F2212/7201 ,  G06F2212/7209

Abstract: In a memory system including a flash memory and a memory controller having a cache memory and a nonvolatile random access memory (NVRAM), a method of operating the memory system includes; receiving a write request specifying a write operation directed to a page of a designated active write block in the flash memory, storing a page mapping table for the active write block in the cache memory, generating update information for the page mapping table stored in the cache memory as a result of executing the write operation, and storing the update information in the NVRAM, and storing an updated version of the page mapping table in the flash memory after execution of the write operation is complete.

Abstract translation: 在包括闪速存储器和具有高速缓冲存储器和非易失性随机存取存储器（NVRAM）的存储器控​​制器的存储器系统中，操作存储器系统的方法包括： 接收写入请求，指定指向闪速存储器中指定的活动写入块的页面的写入操作，将用于所述活动写入块的页面映射表存储在所述高速缓冲存储器中，生成存储在所述高速缓存器中的所述页面映射表的更新信息 作为执行写入操作的结果的存储器，并且将更新信息存储在NVRAM中，并且在执行写入操作之后将页面映射表的更新版本存储在闪存中。

公开(公告)号：USD815658S1

公开(公告)日：2018-04-17

申请号：US29598117

申请日：2017-03-23

Applicant: Samsung Electronics Co., Ltd.

Designer： Joon-Ho Lee ,  Ye-Kyung Yoo ,  Maria Heyoung Moon ,  Jung-Kyung Kwack

Abstract: The design is defined by the visual features of the display of the DISPLAY SCREEN WITH GRAPHICAL USER INTERFACE FOR AN OVEN shown in the drawing, whether those features are features of shape, configuration, ornament or pattern, or a combination of any of those features. The structure shown in dotted line forms no part of the design.In the drawing:FIG. 1 is a front view of the DISPLAY SCREEN WITH GRAPHICAL USER INTERFACE FOR AN OVEN.