-
1.
公开(公告)号:US20200033389A1
公开(公告)日:2020-01-30
申请号:US16272304
申请日:2019-02-11
发明人: Junbae KIM , Yongho CHO
摘要: A semiconductor device test system may include a body providing an internal space, in which a test device is loaded, and a cover coupled to the body to cover the internal space. The cover may include a first cover including first openings two-dimensionally arranged and a second cover including second openings two-dimensionally arranged. An arrangement of the first openings may be different from an arrangement of the second openings.
-
公开(公告)号:US20240304564A1
公开(公告)日:2024-09-12
申请号:US18394974
申请日:2023-12-22
发明人: Junbae KIM , Taehwan KIM , Heejung HWANG
IPC分类号: H01L23/552 , H01L25/00 , H01L25/18 , H10B80/00
CPC分类号: H01L23/552 , H01L25/18 , H01L25/50 , H10B80/00 , H01L23/3128 , H01L24/16 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/73 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/48091 , H01L2224/48227 , H01L2224/73215 , H01L2224/73265
摘要: An electronic device includes a base substrate; a first package mounted on the base substrate, the first package including a first substrate and a first semiconductor chip mounted on the first substrate; a second package mounted on the first package, the second package including a second substrate, a second semiconductor chip mounted on the second substrate, a sealing material surrounding an upper surface of the second substrate and the second semiconductor chip, and a conformal conductive coating formed on at least an upper surface of the sealing material. A conductive fixing portion is secured to a ground pad exposed at an upper surface of the base substrate. A shielding can is secured to the base substrate by the conductive fixing portion and includes a side portion extending around the first and second packages. A metal paste is formed between the shielding can and the conformal conductive coating to contact the shielding can and the conformal conductive coating.
-
公开(公告)号:US20170125085A1
公开(公告)日:2017-05-04
申请号:US15334380
申请日:2016-10-26
发明人: Se-Young KIM , Junbae KIM
IPC分类号: G11C11/4078 , H01L27/02 , H01L27/108 , H02H9/04
CPC分类号: G11C11/4078 , G11C5/14 , G11C11/4074 , H01L27/0266 , H01L27/0285 , H01L27/0288 , H01L27/10897 , H02H9/046
摘要: Disclosed is an integrated protecting circuit, which detects ESD and EOS pulses to prevent an over-voltage from being applied to a semiconductor device. The integrated protecting circuit includes a first detector configured to detect an occurrence of an electrical over-stress between a first node to which a first voltage is applied and a second node to which a second voltage is applied, a second detector configured to detect an occurrence of an electrostatic discharge between the first and second nodes, a determination circuit configured to receive separate outputs of the first and second detectors at the same time and to generate a control signal, and a clamping device configured to perform a turn on/off operation in response to the control signal such that a voltage between the first and second nodes is clamped into a constant voltage.
-
-