公开(公告)号：US10196738B2

公开(公告)日：2019-02-05

申请号：US15407129

申请日：2017-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang-yun Lee ,  Ju-hyun Lee ,  Kee-soo Park ,  Kyu-hee Han ,  Seung-hun Lee ,  Byung-chul Jeon

IPC: C23C14/58 ,  C23C16/455 ,  C23C16/56 ,  H01L21/02 ,  H01L21/67 ,  H01L21/78 ,  H01L21/66 ,  C23C16/24 ,  C23C16/44 ,  C23C16/52

Abstract: Provided are a deposition process monitoring system capable of detecting an internal state of a chamber in a deposition process, and a method of controlling the deposition process and a method of fabricating a semiconductor device using the system. The deposition process monitoring system includes a facility cover configured to define a space for a deposition process, a chamber located in the facility cover, covered with a translucent cover dome, and having a support on which a deposition target is placed, a plurality of lamps disposed in the facility cover, the lamps respectively disposed above and below the chamber, the lamps configured to supply radiant heat energy into the chamber during the deposition process, and a laser sensor disposed outside the chamber, the laser sensor configured to irradiate the cover dome with a laser beam and detect an intensity of the laser beam transmitted through the cover dome, wherein a state of by-products with which the cover dome is coated is determined based on the detected intensity of the laser beam.

公开(公告)号：US20180010243A1

公开(公告)日：2018-01-11

申请号：US15407129

申请日：2017-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang-yun Lee ,  Ju-hyun Lee ,  Kee-soo Park ,  Kyu-hee Han ,  Seung-hun Lee ,  Byung-chul Jeon

IPC: C23C14/58 ,  H01L21/78 ,  C23C16/56 ,  C23C16/455 ,  H01L21/02 ,  H01L21/66 ,  H01L21/67

CPC classification number: C23C14/5813 ,  C23C16/24 ,  C23C16/4401 ,  C23C16/455 ,  C23C16/52 ,  C23C16/56 ,  H01L21/0206 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/67253 ,  H01L21/78 ,  H01L22/26

Abstract: Provided are a deposition process monitoring system capable of detecting an internal state of a chamber in a deposition process, and a method of controlling the deposition process and a method of fabricating a semiconductor device using the system. The deposition process monitoring system includes a facility cover configured to define a space for a deposition process, a chamber located in the facility cover, covered with a translucent cover dome, and having a support on which a deposition target is placed, a plurality of lamps disposed in the facility cover, the lamps respectively disposed above and below the chamber, the lamps configured to supply radiant heat energy into the chamber during the deposition process, and a laser sensor disposed outside the chamber, the laser sensor configured to irradiate the cover dome with a laser beam and detect an intensity of the laser beam transmitted through the cover dome, wherein a state of by-products with which the cover dome is coated is determined based on the detected intensity of the laser beam.

公开(公告)号：US10795262B2

公开(公告)日：2020-10-06

申请号：US16165567

申请日：2018-10-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Park ,  Sang Ki Nam ,  Kyu-hee Han ,  Jin-ok Kim ,  Jin-hong Park ,  Gwang-we Yoo

IPC: G03F7/11 ,  H01L21/027 ,  G03F7/16 ,  G03F7/32 ,  G03F7/20 ,  G03F7/38

Abstract: A method of manufacturing an integrated circuit (IC) device includes exposing a partial region of a photoresist film formed on a main surface of a substrate to generate acid, and diffusing the acid in the partial region of the photoresist film. Diffusing the acid may include applying an electric field, in a direction perpendicular to a direction in which the main surface of the substrate extends, to the photoresist film using an electrode facing the substrate through an electric-field transmission layer filling between the photoresist film and the electrode. The electric-field transmission layer may include an ion-containing layer or a conductive polymer layer.

公开(公告)号：US20130228936A1

公开(公告)日：2013-09-05

申请号：US13850918

申请日：2013-03-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyu-hee Han ,  Sang-hoon Ahn ,  Jang-hee Lee ,  Jong-min Beak ,  Kyoung-hee Kim ,  Byung-lyul Park ,  Byung-hee Kim

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/76801 ,  H01L21/76825 ,  H01L21/76831 ,  H01L21/76898 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2924/00014 ,  H01L2224/05552

Abstract: A method of forming through silicon vias (TSVs) uses a low-k dielectric material as a via insulating layer to thereby improve step coverage and minimize resistive capacitive (RC) delay. To this end, the method includes forming a primary via hole in a semiconductor substrate, depositing low-k dielectric material in the primary via hole, forming a secondary via hole by etching the low-k dielectric in the primary via hole, in such a manner that a via insulating layer and an inter metal dielectric layer of the low-k dielectric layer are simultaneously formed. The via insulating layer is formed of the low-k dielectric material on sidewalls and a bottom surface of the substrate which delimit the primary via hole and the inter metal dielectric layer is formed on an upper surface of the substrate. Then a metal layer is formed on the substrate including in the secondary via hole, and the metal layer is selectively removed from an upper surface of the semiconductor substrate.

Abstract translation: 通过硅通孔（TSV）形成的方法使用低k电介质材料作为通孔绝缘层，从而提高步骤覆盖并最小化电阻电容（RC）延迟。 为此，该方法包括在半导体衬底中形成初级通孔，在初级通孔中沉积低k电介质材料，通过在主通孔中蚀刻低k电介质形成次通孔， 同时形成低k电介质层的通孔绝缘层和金属间介电层的方式。 通孔绝缘层由侧壁上的低k电介质材料和限定初级通孔的衬底的底面形成，并且金属介电层形成在衬底的上表面上。 然后在包括在二次通孔中的基板上形成金属层，并且从半导体基板的上表面选择性地去除金属层。