SYSTEM ON CHIP PERFORMING CLOCK TRAINING AND COMPUTING SYSTEM INCLUDING THE SAME

    公开(公告)号:US20190253043A1

    公开(公告)日:2019-08-15

    申请号:US16112921

    申请日:2018-08-27

    IPC分类号: H03K5/156 G06F1/10

    CPC分类号: H03K5/1565 G06F1/10

    摘要: A system on chip includes a clock generator configured to generate a clock signal, and output the clock signal to a component device external to the system on chip. The system on chip further includes a duty ratio determiner configured to determine a component duty ratio, in response to a response that is received from the component device according to the clock signal, and a duty ratio adjustor configured to adjust a current duty ratio of the clock signal to the component duty ratio, and output the clock signal of which the current duty ratio is adjusted, to the component device.

    DISPLAY DEVICE AND METHOD OF DISPLAYING SCREEN ON SAID DISPLAY DEVICE
    3.
    发明申请
    DISPLAY DEVICE AND METHOD OF DISPLAYING SCREEN ON SAID DISPLAY DEVICE 审中-公开
    显示装置和在显示装置上显示屏幕的方法

    公开(公告)号:US20160196057A1

    公开(公告)日:2016-07-07

    申请号:US14912783

    申请日:2014-08-13

    IPC分类号: G06F3/0488 G06F3/0484

    摘要: A method of displaying for allowing a plurality of application windows to be easily controlled and a display device therefor are provided. A method of displaying a screen on a display device includes displaying a button on a touch screen; splitting the touch screen into a plurality of regions based on the position at which the button is displayed, receiving a touch input to move a displayed button, obtaining a slope value of a line connecting a start point of the touch input to an end point thereof, selecting a region corresponding to the slope value from among the plurality of regions split, and moving the button to a certain position included in a selected region.

    摘要翻译: 提供一种用于允许容易地控制多个应用程序窗口的显示方法及其显示装置。 一种在显示装置上显示屏幕的方法包括在触摸屏上显示按钮; 基于显示按钮的位置将触摸屏分割成多个区域,接收触摸输入以移动所显示的按钮,获得将触摸输入的起始点连接到其终点的线的斜率值 从所述多个区域中选择与所述斜率值对应的区域,并且将所述按钮移动到包括在所选区域中的某个位置。

    INTEGRATED CIRCUITS INCLUDING MULTI-LAYER CONDUCTING LINES

    公开(公告)号:US20210202373A1

    公开(公告)日:2021-07-01

    申请号:US17197280

    申请日:2021-03-10

    摘要: An integrated circuit includes a plurality of layers stacked in a first direction, a plurality of unit circuits at least partially overlapping each other in a second direction that is perpendicular to the first direction and configured to operate in parallel with one another, control circuitry configured to generate a control signal to control the plurality of unit circuits, and a multi-layer conducting line configured to transfer the control signal from the control circuitry to the plurality of unit circuits. The multi-layer conducting line may be integrally formed in a wiring layer and a via layer and extends in the second direction. The wiring layer and the via layer may be adjacent to each other.

    SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体发光器件及其制造方法

    公开(公告)号:US20150364652A1

    公开(公告)日:2015-12-17

    申请号:US14736217

    申请日:2015-06-10

    IPC分类号: H01L33/38 H01L33/62

    摘要: A semiconductor light-emitting device, and a method of manufacturing the same. The semiconductor light-emitting device includes a first electrode layer, an insulating layer, a second electrode layer, a second semiconductor layer, an active layer, and a first semiconductor layer that are sequentially stacked on a substrate, a first contact that passes through the substrate to be electrically connected to the first electrode layer, and a second contact that passes through the substrate, the first electrode layer, and the insulating layer to communicate with the second electrode layer. The first electrode layer is electrically connected to the first semiconductor layer by filling a contact hole that passes through the second electrode layer, the second semiconductor layer, and the active layer, and the insulating layer surrounds an inner circumferential surface of the contact hole to insulate the first electrode layer from the second electrode layer.

    摘要翻译: 半导体发光器件及其制造方法。 半导体发光器件包括依次堆叠在衬底上的第一电极层,绝缘层,第二电极层,第二半导体层,有源层和第一半导体层,通过 基板与第一电极层电连接,第二触点通过基板,第一电极层和绝缘层与第二电极层连通。 第一电极层通过填充穿过第二电极层,第二半导体层和有源层的接触孔而电连接到第一半导体层,并且绝缘层围绕接触孔的内周表面以绝缘 来自第二电极层的第一电极层。

    METHOD AND APPARATUS FOR MANAGING MEMORY OF DEVICE
    8.
    发明申请
    METHOD AND APPARATUS FOR MANAGING MEMORY OF DEVICE 有权
    用于管理设备存储器的方法和装置

    公开(公告)号:US20150269068A1

    公开(公告)日:2015-09-24

    申请号:US14656019

    申请日:2015-03-12

    IPC分类号: G06F12/02

    摘要: A method of managing a memory of a device is provided. The method includes acquiring amount of memory use information of the device, estimating a memory use pattern, based on the amount of memory use information of the device, and acquiring an amount of memory of the device, based on the estimated memory use pattern.

    摘要翻译: 提供了一种管理设备的存储器的方法。 该方法包括:基于估计的存储器使用模式,基于设备的存储器使用信息的量获取设备的存储器使用信息量,估计存储器使用模式,以及获取设备的存储量。

    INTEGRATED CIRCUITS AND METHODS FOR DYNAMIC FREQUENCY SCALING
    9.
    发明申请
    INTEGRATED CIRCUITS AND METHODS FOR DYNAMIC FREQUENCY SCALING 有权
    集成电路和动态频率分级方法

    公开(公告)号:US20140204697A1

    公开(公告)日:2014-07-24

    申请号:US14082308

    申请日:2013-11-18

    发明人: Tae-hyung KIM

    IPC分类号: H03L7/08 G11C11/4076

    摘要: In an integrated circuit, a first delay locked loop circuit is configured to adjust a phase of a first clock signal input to a first clock input terminal, and to at least one of transmit and receive information based on the phase-adjusted first clock signal. A second delay locked loop circuit is configured to adjust a phase of a second clock signal input to a second clock input terminal, and to at least one of transmit and receive information based on the phase-adjusted second clock signal. A path selection circuit is configured to select, in response to a select signal, one of a first signal path through the first delay locked loop circuit and a second signal path through the second delay locked loop circuit as a signal path for at least one of transmitting and receiving the information.

    摘要翻译: 在集成电路中,第一延迟锁定环电路被配置为基于相位调整的第一时钟信号来调整输入到第一时钟输入端的第一时钟信号的相位和至少一个发送和接收信息。 第二延迟锁定环电路被配置为基于相位调整的第二时钟信号来调整输入到第二时钟输入端的第二时钟信号的相位和至少一个发送和接收信息。 路径选择电路被配置为响应于选择信号选择通过第一延迟锁定环电路的第一信号路径和通过第二延迟锁定环电路的第二信号路径中的一个作为用于以下的至少一个的信号路径: 发送和接收信息。