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公开(公告)号:US11195910B2
公开(公告)日:2021-12-07
申请号:US16214659
申请日:2018-12-10
发明人: Young-Hun Kim , Jae Seok Yang , Hae Wang Lee
IPC分类号: H01L29/06 , H01L29/66 , H01L29/423 , H01L27/092 , H01L29/78 , H01L29/49
摘要: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
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公开(公告)号:US10957765B2
公开(公告)日:2021-03-23
申请号:US16051667
申请日:2018-08-01
发明人: Pan-Jae Park , Jae-Seok Yang , Young-Hun Kim , Hae-Wang Lee , Kwan-Young Chun
IPC分类号: H01L29/08 , H01L27/088 , H01L27/02 , H01L27/118 , H01L27/092 , H01L21/8234 , H01L29/78 , H01L29/66 , H01L21/8238
摘要: A semiconductor device is provided including a substrate, a first gate structure, a first contact plug and a power rail. The substrate includes first and second cell regions extending in a first direction, and a power rail region connected to each of opposite ends of the first and second cell regions in a second direction. The first gate structure extends in the second direction from a boundary area between the first and second cell regions to the power rail region. The first contact plug is formed on the power rail region, and contacts an upper surface of the first gate structure. The power rail extends in the first direction on the power rail region, and is electrically connected to the first contact plug. The power rail supplies a turn-off signal to the first gate structure through the first contact plug to electrically insulate the first and second cell regions.
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公开(公告)号:US10320408B2
公开(公告)日:2019-06-11
申请号:US15862794
申请日:2018-01-05
发明人: Young-Hun Kim , Yunseob Song , Jonghwa Won , Wangseup Yeum
摘要: An electronic circuit includes a peak detector, a gain controller, and a compressor. The peak detector detects a peak level from a digital input. The gain controller outputs a digital gain with regard to increasing the peak level to a target level, The compressor provides the gain controller with a compressed gain which is to be output as the digital gain, based on the detected peak level. In a compression interval where the peak level is greater than a threshold level, the output digital gain increases as the peak level decreases. The compressor generates the compressed gain such that a ratio of an increment of the output digital gain to a decrement of the peak level in the compression interval is less than a reference ratio.
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4.
公开(公告)号:US20190098404A1
公开(公告)日:2019-03-28
申请号:US15983460
申请日:2018-05-18
发明人: Myung-Jin LEE , Young-Hun Kim
IPC分类号: H04R3/00 , H02H7/20 , H02H1/00 , H01R13/703
摘要: An electronic circuit includes an output generator and an over-voltage detector. The output generator is configured to output an output signal to an output terminal. In response to an amplitude of a voltage of the output terminal being greater than an allowable amplitude, the over-voltage detector is configured to output an over-voltage detection signal of a first logic value, such that elements included in the output generator are turned off. In response to the over-voltage detector outputting the over-voltage detection signal of the first logic value again before a reference time elapses after the first logic value of the over-voltage detection signal changes to a second logic value of the over-voltage detection signal, the turned-off elements remain turned off. In response to the over-voltage detector outputting the over-voltage detection signal of the second logic value during the reference time, the turned-off elements are turned on.
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5.
公开(公告)号:US09232449B2
公开(公告)日:2016-01-05
申请号:US14223176
申请日:2014-03-24
发明人: Gyu-Hyun Lim , Young-Hun Kim , Jae-Hwan Lee
CPC分类号: H04W36/0083 , H04W84/045
摘要: A method and apparatus are provided for setting a neighbor in a Radio Network Controller (RNC) of a mobile communication system. The method includes receiving, from a Node B, a message indicating that a radio link is released; storing source cell information, when restoration of the radio link fails; receiving, from a User Equipment (UE), an RRC cell update message; storing target cell information included in the RRC cell update message; determining whether a neighbor of a source cell and a target cell is set, based on the source cell information and the target cell information; and setting the neighbor by using the source cell information and the target cell information if the neighbor is not set.
摘要翻译: 提供了一种用于在移动通信系统的无线电网络控制器(RNC)中设置邻居的方法和装置。 该方法包括从节点B接收指示无线电链路被释放的消息; 存储源小区信息,当无线链路恢复失败时; 从用户设备(UE)接收RRC小区更新消息; 存储所述RRC小区更新消息中包含的目标小区信息; 基于所述源小区信息和所述目标小区信息来确定源小区和目标小区的邻居是否被设置; 并且如果没有设置邻居,则使用源小区信息和目标小区信息来设置邻居。
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公开(公告)号:US20130299912A1
公开(公告)日:2013-11-14
申请号:US13833153
申请日:2013-03-15
发明人: Ju-Youn Kim , Young-Hun Kim
IPC分类号: H01L27/088 , H01L21/02
CPC分类号: H01L29/517 , H01L21/02 , H01L21/28088 , H01L21/28167 , H01L21/28194 , H01L21/823857 , H01L27/088 , H01L27/092 , H01L27/1104 , H01L29/4966 , H01L29/513 , H01L29/78
摘要: A semiconductor device having high-k gate insulation films and a method of fabricating the semiconductor device are provided. The semiconductor device includes a first gate insulation film on a substrate and the first gate insulation film includes a material selected from the group consisting of HfO2, ZrO2, Ta2O5, TiO2, SrTiO3 and (Ba,Sr)TiO3, and lanthanum (La). Additionally, the semiconductor device includes a first barrier film on the first gate insulation film, a first gate electrode on the first barrier film, and n-type source/drain regions in the substrate at both sides of the first gate electrode.
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公开(公告)号:US11973109B2
公开(公告)日:2024-04-30
申请号:US17526840
申请日:2021-11-15
发明人: Young-Hun Kim , Jae Seok Yang , Hae Wang Lee
IPC分类号: H01L29/06 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/66 , H01L29/78 , H01L21/762
CPC分类号: H01L29/0649 , H01L27/0924 , H01L29/42376 , H01L29/4916 , H01L29/6656 , H01L29/6681 , H01L29/7851 , H01L21/76224 , H01L29/0653 , H01L29/66545
摘要: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
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公开(公告)号:US11551978B2
公开(公告)日:2023-01-10
申请号:US17089822
申请日:2020-11-05
发明人: Young-Hun Kim , Jaeseok Yang , Haewang Lee
IPC分类号: H01L21/8234 , H01L29/66 , H01L29/78 , H01L21/308 , H01L27/088
摘要: Disclosed are semiconductor devices and methods of fabricating the same. The method comprises sequentially stacking a lower sacrificial layer and an upper sacrificial layer on a substrate, patterning the upper sacrificial layer to form a first upper sacrificial pattern and a second upper sacrificial pattern, forming a first upper spacer and a second upper spacer on sidewalls of the first upper sacrificial pattern and a second upper sacrificial pattern, respectively, using the first and second upper spacers as an etching mask to pattern the lower sacrificial layer to form a plurality of lower sacrificial patterns, forming a plurality of lower spacers on sidewalls of the lower sacrificial patterns, and using the lower spacers as an etching mask to pattern the substrate. The first and second upper spacers are connected to each other.
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公开(公告)号:US10861747B2
公开(公告)日:2020-12-08
申请号:US16439860
申请日:2019-06-13
发明人: Young-Hun Kim , Jaeseok Yang , Haewang Lee
IPC分类号: H01L21/8234 , H01L29/66 , H01L29/78 , H01L21/308 , H01L27/088
摘要: Disclosed are semiconductor devices and methods of fabricating the same. The method comprises sequentially stacking a lower sacrificial layer and an upper sacrificial layer on a substrate, patterning the upper sacrificial layer to form a first upper sacrificial pattern and a second upper sacrificial pattern, forming a first upper spacer and a second upper spacer on sidewalls of the first upper sacrificial pattern and a second upper sacrificial pattern, respectively, using the first and second upper spacers as an etching mask to pattern the lower sacrificial layer to form a plurality of lower sacrificial patterns, forming a plurality of lower spacers on sidewalls of the lower sacrificial patterns, and using the lower spacers as an etching mask to pattern the substrate. The first and second upper spacers are connected to each other.
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公开(公告)号:US20190130950A1
公开(公告)日:2019-05-02
申请号:US15985200
申请日:2018-05-21
发明人: Young-Hun Kim , Sihong Kim
IPC分类号: G11C7/10 , G11C7/22 , G11C11/4093 , G11C11/4091
CPC分类号: G11C11/4093 , G11C5/025 , G11C7/106 , G11C7/1066 , G11C7/1087 , G11C7/1093 , G11C7/222 , G11C11/4076 , G11C11/4091 , G11C29/028 , G11C2207/105 , G11C2207/107 , G11C2207/2254
摘要: A semiconductor memory device includes a memory core that performs reading and writing of data, data delivery and training blocks that are connected between first pads and the memory core, and at least one data delivery, clock generation and training block that is connected between at least one second pad and the memory core. In a first training operation, the data delivery and training blocks output first training data, received through the first pads, through the first pads as second training data. In a second training operation, at least one of the data delivery and training blocks outputs third training data, received through the at least one second pad, through at least one of the first pads as fourth training data. The second training data and the fourth training data are output in synchronization with read data strobe signals output through the at least one second pad.
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