公开(公告)号：US20250069992A1

公开(公告)日：2025-02-27

申请号：US18940141

申请日：2024-11-07

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yong LIU ,  Qing YANG

IPC: H01L23/492 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373

Abstract: A dual-side cooling (DSC) semiconductor package includes a first metal-insulator-metal (MIM) substrate having a first insulator layer, first metallic layer, and second metallic layer. A second MIM substrate includes a second insulator layer, third metallic layer, and fourth metallic layer. The third metallic layer includes a first portion having a first contact area and a second portion, electrically isolated from the first portion, having a second contact area. A semiconductor die is coupled with the second metallic layer and is directly coupled with the third metallic layer through one or more solders, sintered layers, electrically conductive tapes, solderable top metal (STM) layers, and/or under bump metal (UBM) layers. The first contact area is electrically coupled with a first electrical contact of the die and the second contact area is electrically coupled with a second electrical contact of the die. The first and fourth metallic layers are exposed through an encapsulant.

公开(公告)号：US20220208666A1

公开(公告)日：2022-06-30

申请号：US17655216

申请日：2022-03-17

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Qing YANG ,  Yong LIU ,  Yushuang YAO

IPC: H01L23/498 ,  H01L25/18 ,  H01L21/48 ,  H01L25/07 ,  H01L23/00 ,  H01L23/32

Abstract: A power module can include a casing mounted to a baseplate that contains a substrate with circuitry. The circuitry can include pins for coupling signals to/from the circuitry. These pins can extend through a cover portion of the casing so that an electronic substrate, such as a printed circuit board (PCB) can be press-fit onto the pins. When press-fit, the electronic substrate is supported and positioned by support pillars that extend from the base plate to above the cover portion of the casing. If the pins and the support pillars have different coefficients of thermal expansion, damage to connection points between the pins and the circuitry may occur. Here, a power module is disclosed that has thermally matched pins and support pillars so that when the system is thermally cycled over a range of temperatures, the connection points are not damaged by forces induced by thermal expansion.

公开(公告)号：US20220208637A1

公开(公告)日：2022-06-30

申请号：US17655398

申请日：2022-03-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Liangbiao CHEN ,  Yong LIU ,  Tzu-Hsuan CHENG ,  Stephen ST. GERMAIN ,  Roger ARBUTHNOT

IPC: H01L23/367 ,  H01L21/56 ,  H01L23/373 ,  H01L23/31 ,  H01L23/00 ,  H05K7/20

Abstract: A power module includes a spacer block, a thermally conductive substrate coupled to one side of the spacer block, and a semiconductor device die coupled to an opposite side of the spacer block. The spacer block includes a solid spacer block and an adjacent flexible spacer block. An inner portion of the device die is coupled to the solid spacer block, and an outer portion of the semiconductor device die is coupled to the adjacent flexible spacer block.
Claims 3 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.

公开(公告)号：US20220208635A1

公开(公告)日：2022-06-30

申请号：US17136286

申请日：2020-12-29

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yong LIU ,  Liangbiao CHEN ,  Yusheng LIN ,  Chee Hiong CHEW

IPC: H01L23/367 ,  H01L23/373 ,  H01L21/48

Abstract: A method includes bonding a device die to a direct bonded metal (DBM) substrate, bonding a spacer block to the device die, and at least partially reducing coefficient of thermal expansion (CTE) mismatches between the DBM substrate, the spacer block and the device die. At least partially reducing the CTE mismatches between the DBM substrate, the spacer block and the device die includes at least one of: disposing an arrangement of pillars and grooves in a surface region of the spacer block coupled to the device die, disposing at least one cavity in the spacer block, and disposing a groove in an outer conductive layer of the DBM substrate.

公开(公告)号：US20210249329A1

公开(公告)日：2021-08-12

申请号：US16784999

申请日：2020-02-07

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Liangbiao CHEN ,  Yong LIU ,  Tzu-Hsuan CHENG ,  Stephen ST. GERMAIN ,  Roger ARBUTHNOT

IPC: H01L23/367 ,  H01L21/56 ,  H01L23/373 ,  H01L23/31 ,  H05K7/20 ,  H01L23/00

Abstract: A power module includes a spacer block, a thermally conductive substrate coupled to one side of the spacer block, and a semiconductor device die coupled to an opposite side of the spacer block. The spacer block includes a solid spacer block and an adjacent flexible spacer block. An inner portion of the device die is coupled to the solid spacer block, and an outer portion of the semiconductor device die is coupled to the adjacent flexible spacer block.

公开(公告)号：US20210225797A1

公开(公告)日：2021-07-22

申请号：US17220661

申请日：2021-04-01

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yong LIU ,  Yusheng LIN ,  Huibin CHEN

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/532 ,  H01L23/373 ,  H01L21/56

Abstract: In a general aspect, a method for producing a semiconductor device assembly can include defining a cavity in a conductive spacer, and electrically and thermally coupling a semiconductor die with the conductive spacer, such that the semiconductor die is at least partially embedded in the cavity. The semiconductor die can have a first surface having active circuitry included therein, a second surface opposite the first surface, and a plurality of side surfaces each extending between the first surface of the semiconductor die and the second surface of the semiconductor die. The method can also include electrically coupling a direct bonded metal (DBM) substrate with the first surface of the semiconductor die.

公开(公告)号：US20250096159A1

公开(公告)日：2025-03-20

申请号：US18970731

申请日：2024-12-05

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yong LIU ,  Qing YANG

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/373 ,  H01L25/00 ,  H01L25/07 ,  H01L25/18

Abstract: In a general aspect, a method of producing a signal distribution assembly includes forming a first metal layer having a first, planar side and a second, non-planar side opposite the first side. The second side includes a first base portion, a first post extending from the first base portion; and a second post extending from the first base portion. The method also includes molding the first metal layer such that a molding compound is disposed on the second side of the first metal layer with respective upper surfaces of the first and second posts being exposed through the molding compound. The method further includes coupling the first side of the first metal layer to a first surface of a thermally conductive insulator layer and coupling a second metal layer with a second surface of the thermally conductive insulator layer opposite the first surface of the thermally conductive insulator layer.

公开(公告)号：US20240371659A1

公开(公告)日：2024-11-07

申请号：US18311100

申请日：2023-05-02

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yong LIU ,  Liangbiao CHEN ,  Chee Hiong CHEW

IPC: H01L21/56 ,  H01L21/477 ,  H01L23/00 ,  H01L23/373 ,  H01L23/495

Abstract: A high-power semiconductor device module is implemented with a cavity in the molding package. The cavity reduces a volume of the molding compound, preventing an accumulation of stress in the module, and associated warpage of the package. Chip assemblies within the module are designed to fit within the cavity, so that semiconductor dies, and sensing devices therein are protected from damage during a sintering process in which the module is mounted to a heat sink. After the sintering process, the cavity can be sealed with a gel material. The molding package described herein can also enhance reliability of the module during operation, ensuring that the product is robust for electric and hybrid electric vehicle applications.

公开(公告)号：US20240030122A1

公开(公告)日：2024-01-25

申请号：US17813380

申请日：2022-07-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yong LIU ,  Yusheng LIN ,  Jerome TEYSSEYRE

IPC: H01L23/498 ,  H01L23/367 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/367 ,  H01L24/32 ,  H01L24/33 ,  H01L24/29 ,  H01L24/30 ,  H01L23/3735

Abstract: A substrate includes a ceramic tile and a three-dimensional (3D) conductive structure. The 3D conductive structure includes a planar base layer having a bottom surface bonded to a top surface of the ceramic tile, and a block disposed above the planar base layer. The block is monolithically integrated with the planar base layer. A top surface of the block is configured as a die attach pad. The planar base layer has a base vertical thickness from the top surface of the ceramic tile to a top surface of the planar base layer. The block and the planar base layer have a combined vertical thickness from the top surface of the ceramic tile to a top surface of the block that is greater than the base vertical thickness.

公开(公告)号：US20220173049A1

公开(公告)日：2022-06-02

申请号：US17247094

申请日：2020-11-30

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yong LIU ,  Stephen St. Germain

IPC: H01L23/532 ,  H01L23/00 ,  H01L21/768

Abstract: Implementations described herein are related to an improved semiconductor device package for providing an electrical connection between one or more semiconductor die and one or more substrates. The one or more substrates includes a dielectric layer having a first side and a second side opposite the first side, and a first metal layer bonded to the first side of the dielectric layer, the first metal layer having a first portion and a second portion. The semiconductor device package can also include a semiconductor die disposed onto the first metal layer within the first portion of the first metal layer. In some implementations, the one or more conducting substrates includes a direct bonded copper (DBC) substrate, i.e., the metal is copper.