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公开(公告)号：US11710687B2
公开(公告)日：2023-07-25
申请号：US16502441
申请日：2019-07-03
发明人： Chee Hiong Chew , Yushuang Yao , Atapol Prajuckamol , Chuncao Niu
IPC分类号： H01L23/498 , H05K1/18 , H01L23/40 , H01L23/538 , H01L23/00
CPC分类号： H01L23/49811 , H01L23/40 , H01L23/49838 , H01L23/5385 , H01L23/562 , H05K1/184 , H01L2023/4087
摘要： A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may have a height greater than the one or more pressfit pins.
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公开(公告)号：US11081828B2
公开(公告)日：2021-08-03
申请号：US16510385
申请日：2019-07-12
发明人： Jihwan Kim , Yushuang Yao , Bosung Won , Atapol Prajuckamol , Olaf Zschieschang
IPC分类号： H01R12/00 , H01R13/504 , H05K7/14 , H01R13/621
摘要： A housing that can be used for a power module in a power system is disclosed. The housing includes features to improve the insulating properties and to reduce or eliminate a mechanical stress on a housing that could crack or break a substrate contained within the housing. The insulating properties are improved by protrusions that surround apertures for press-fit pins. Each protrusion can increase a creepage for the housing by extending the surface of the housing along a press-fit pin. The mechanical stress is reduced by a mounting flange that includes a wedge surface and a flexible structure that react to a force applied when the mounting flange is fastened to a surface by a fastener.
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公开(公告)号：US10319659B2
公开(公告)日：2019-06-11
申请号：US15783533
申请日：2017-10-13
发明人： Atapol Prajuckamol , C H Chew , Yushuang Yao
IPC分类号： H01L23/14 , H01L23/32 , H01L23/13 , H01L23/58 , H01L23/04 , H01L23/498 , H01L21/48 , H01L21/56 , H01L23/40 , H01L23/31 , H01L23/373 , H01L21/60
摘要： Implementations of semiconductor packages may include: a substrate comprising a first side and a second side and a hole in the substrate. The hole extending from the first side to the second side of the substrate and positioned in a center of the substrate. The semiconductor packages may also include a bushing around the hole to the first side of the substrate. The semiconductor packages may also include a plurality of pin holders arranged and coupled on the substrate. The semiconductor package may also include a molding compound at least partially encapsulating the substrate, encapsulating a side surface of the bushing, and encapsulating a plurality of side surfaces of the plurality of pin holders.
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公开(公告)号：US11894292B2
公开(公告)日：2024-02-06
申请号：US17655216
申请日：2022-03-17
发明人： Qing Yang , Yong Liu , Yushuang Yao
IPC分类号： H01L23/498 , H01L23/32 , H01L25/07 , H01L21/48 , H01L25/18 , H01L23/00 , H01L23/373
CPC分类号： H01L23/49811 , H01L21/4817 , H01L21/4853 , H01L23/32 , H01L23/562 , H01L25/072 , H01L25/18 , H01L23/3735
摘要： A power module can include a casing mounted to a baseplate that contains a substrate with circuitry. The circuitry can include pins for coupling signals to/from the circuitry. These pins can extend through a cover portion of the casing so that an electronic substrate, such as a printed circuit board (PCB) can be press-fit onto the pins. When press-fit, the electronic substrate is supported and positioned by support pillars that extend from the base plate to above the cover portion of the casing. If the pins and the support pillars have different coefficients of thermal expansion, damage to connection points between the pins and the circuitry may occur. Here, a power module is disclosed that has thermally matched pins and support pillars so that when the system is thermally cycled over a range of temperatures, the connection points are not damaged by forces induced by thermal expansion.
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公开(公告)号：US10897821B2
公开(公告)日：2021-01-19
申请号：US16217753
申请日：2018-12-12
IPC分类号： H05K3/30 , H05K1/18 , H05K3/40 , H01L23/498 , H05K1/02 , H05K1/03 , H05K1/09 , H05K3/34 , H01L23/48 , H01L23/15 , H01L23/373
摘要： One illustrative method embodiment includes: providing a direct bonded copper (DBC) substrate including a plurality of copper traces; providing a guide plate having protrusions on a surface of the guide plate; mounting hollow bush rings onto the protrusions; mounting the bush rings onto the copper traces by aligning the protrusions of the guide plate with solder units on said copper traces; attaching the bush rings and one or more dies to the copper traces by simultaneously reflowing said solder units and other solder units positioned between the dies and the copper traces; and after said simultaneous reflow, removing the protrusions from the bush rings.
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公开(公告)号：US10559905B2
公开(公告)日：2020-02-11
申请号：US16249429
申请日：2019-01-16
摘要： Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base; wherein the at least two curved legs are configured to flex to allow the bottom contact surface of the vertical stop to move toward the upper contact surface of the horizontal base in response to a pressure applied to the pin along a direction collinear with a longest length of the pin toward the upper contact surface, and; wherein the vertical stop is configured to stop movement of the pin when the bottom contact surface contacts the upper contact surface.
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公开(公告)号：US10224655B2
公开(公告)日：2019-03-05
申请号：US15443671
申请日：2017-02-27
摘要： Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base; wherein the at least two curved legs are configured to flex to allow the bottom contact surface of the vertical stop to move toward the upper contact surface of the horizontal base in response to a pressure applied to the pin along a direction collinear with a longest length of the pin toward the upper contact surface, and; wherein the vertical stop is configured to stop movement of the pin when the bottom contact surface contacts the upper contact surface.
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公开(公告)号：US20170170083A1
公开(公告)日：2017-06-15
申请号：US15136605
申请日：2016-04-22
IPC分类号： H01L23/053 , H01L23/498 , H01L25/00 , H01L21/56 , H01L21/52 , H01L25/07 , H01L21/48 , H01L23/08 , H01L23/06 , H01L23/00 , H01L25/065 , H01L23/18 , H01L21/54
CPC分类号： H01L23/053 , H01L21/52 , H01L23/49811 , H01L24/48 , H01L24/49 , H01L24/85 , H01L25/0655 , H01L25/072 , H01L25/50 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/01014 , H01L2924/13055 , H01L2924/13091 , H01L2924/15738 , H01L2924/15747 , H01L2224/45099
摘要： Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate and a plurality of press-fit pins. The press-fit pins are molded into and fixedly coupled with the case. The pins are also electrically and mechanically coupled to the substrate.
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公开(公告)号：US11804421B2
公开(公告)日：2023-10-31
申请号：US17247200
申请日：2020-12-03
IPC分类号： H01L23/495 , H01L23/00
CPC分类号： H01L23/49513 , H01L23/49548 , H01L24/29 , H01L24/33 , H01L24/83 , H01L2224/8384 , H01L2224/83439
摘要： A semiconductor package assembly having a connecting clip disposed on both a first material stack and a second material stack having different thicknesses and disposed on a conducting substrate. This connecting clip has a first portion disposed on to the first material stack and second portion disposed on the second material stack, such that the surfaces of the first portion and second portion opposite the conducting substrate are at the same perpendicular distance from the conducting substrate. For example, in some implementations, when the thickness of the second material stack is smaller than the thickness of the first material stack, the second portion of the connecting clip may include a vertical support disposed on the second material stack to equalize the heights of the surfaces of the first portion and second portion of the connecting clip.
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公开(公告)号：US11342237B2
公开(公告)日：2022-05-24
申请号：US15136605
申请日：2016-04-22
IPC分类号： H01L25/18 , H01L23/053 , H01L23/498 , H01L25/00 , H01L21/52 , H01L23/00 , H01L25/065 , H01L25/07
摘要： Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate and a plurality of press-fit pins. The press-fit pins are molded into and fixedly coupled with the case. The pins are also electrically and mechanically coupled to the substrate.
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