公开(公告)号：US09966259B2

公开(公告)日：2018-05-08

申请号：US15585518

申请日：2017-05-03

申请人： SANKEN ELECTRIC CO., LTD ,  SHIN-ETSU HANDOTAI CO. LTD.

发明人： Hiroshi Shikauchi ,  Ken Sato ,  Hirokazu Goto ,  Masaru Shinomiya ,  Keitaro Tsuchiya ,  Kazunori Hagimoto

IPC分类号： H01L21/02 ,  H01L29/36 ,  H01L21/225 ,  C30B25/18 ,  C30B29/06 ,  C30B29/40 ,  H01L29/778 ,  H01L29/66

CPC分类号： H01L21/02658 ,  C30B23/025 ,  C30B25/18 ,  C30B25/186 ,  C30B29/06 ,  C30B29/403 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0254 ,  H01L21/0259 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/2251 ,  H01L21/2258 ,  H01L29/36 ,  H01L29/66462 ,  H01L29/7786

摘要： A silicon-based substrate on which a nitride compound semiconductor layer is formed on a front surface thereof, including a first portion provided on the front surface side which has a first impurity concentration and a second portion provided on an inner side of the first portion which has a second impurity concentration higher than the first impurity concentration, wherein the first impurity concentration being 1×1014 atoms/cm3 or more and less than 1×1019 atoms/cm3. Consequently, there is provided the silicon-based substrate in which the crystallinity of the nitride compound semiconductor layer formed on an upper side thereof can be maintained excellently while improving a warpage of the substrate.

公开(公告)号：US09876101B2

公开(公告)日：2018-01-23

申请号：US15302684

申请日：2015-03-12

申请人： SANKEN ELECTRIC CO., LTD. ,  SHIN-ETSU HANDOTAI CO. LTD.

发明人： Ken Sato ,  Hiroshi Shikauchi ,  Hirokazu Goto ,  Masaru Shinomiya ,  Kazunori Hagimoto ,  Keitaro Tsuchiya

IPC分类号： H01L29/20 ,  H01L29/778 ,  H01L29/66 ,  H01L29/207 ,  H01L21/02

CPC分类号： H01L29/7786 ,  H01L21/02378 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/66462

摘要： A semiconductor substrate including a substrate, a buffer layer having a nitride-based semiconductor containing carbon provided on the substrate, a high-resistance layer having a nitride-based semiconductor containing carbon provided on the buffer layer, and a channel layer having a nitride-based semiconductor provided on the high-resistance layer, the high-resistance layer including a first region having carbon concentration lower than that of the buffer layer, and a second region which is provided between the first region and the channel layer, and has the carbon concentration higher than the first region. As a result, it is possible to provide the semiconductor substrate which can reduce a leak current by enhancing crystallinity of the high-resistance layer while maintaining a high resistance of the high-resistance layer, and suppress occurrence of a decrease in electron mobility or current collapse in the channel layer by likewise enhancing crystallinity of the channel layer formed on the high-resistance layer.

公开(公告)号：US09520286B2

公开(公告)日：2016-12-13

申请号：US14892034

申请日：2014-05-02

申请人： SANKEN ELECTRIC CO., LTD. ,  SHIN-ETSU HANDOTAI CO., LTD.

发明人： Hiroshi Shikauchi ,  Ken Sato ,  Hirokazu Goto ,  Masaru Shinomiya ,  Keitaro Tsuchiya ,  Kazunori Hagimoto

IPC分类号： H01L29/36 ,  H01L21/02 ,  H01L29/66 ,  H01L29/20 ,  H01L29/15 ,  H01L29/205 ,  H01L29/778 ,  H01L29/10

CPC分类号： H01L21/0254 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0251 ,  H01L29/1075 ,  H01L29/157 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/36 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787

摘要： A semiconductor substrate having a silicon-based substrate, a buffer layer provided on the silicon-based substrate and made of a nitride semiconductor containing boron, and an operation layer formed on the buffer layer, wherein a concentration of boron in the buffer layer gradually decreasing toward a side of the operation layer from a side of the silicon-based substrate. Thereby, the semiconductor substrate in which the buffer layer contains boron sufficient to obtain a dislocation suppression effect and boron is not diffused to the operation layer is provided.

摘要翻译： 一种半导体衬底，其具有硅基衬底，设置在硅基衬底上并由含有硼的氮化物半导体构成的缓冲层以及形成在缓冲层上的操作层，其中缓冲层中的硼浓度逐渐降低 从硅基基板的一侧朝向操作层的一侧。 由此，提供缓冲层含有足以获得位错抑制效果的硼的半导体基板和不扩散到操作层的硼。

公开(公告)号：US10115589B2

公开(公告)日：2018-10-30

申请号：US15538500

申请日：2015-12-18

申请人： SHIN-ETSU HANDOTAI CO., LTD. ,  SANKEN ELECTRIC CO., LTD.

发明人： Kazunori Hagimoto ,  Masaru Shinomiya ,  Keitaro Tsuchiya ,  Hirokazu Goto ,  Ken Sato ,  Hiroshi Shikauchi

IPC分类号： H01L21/44 ,  H01L27/108 ,  H01L21/02 ,  H01L29/78 ,  H01L29/778 ,  H01L29/20

摘要： An epitaxial substrate for electronic devices, including: a Si-based substrate; an AlN initial layer provided on the Si-based substrate; and a buffer layer provided on the AlN initial layer, wherein the roughness Sa of the surface of the AlN initial layer on the side where the buffer layer is located is 4 nm or more. As a result, an epitaxial substrate for electronic devices, in which V pits in a buffer layer structure can be suppressed and longitudinal leakage current characteristics can be improved when an electronic device is fabricated therewith, is provided.

公开(公告)号：US09673052B2

公开(公告)日：2017-06-06

申请号：US14892373

申请日：2014-05-02

申请人： SANKEN ELECTRIC CO., LTD. ,  SHIN-ETSU HANDOTAI CO., LTD.

发明人： Hiroshi Shikauchi ,  Ken Sato ,  Hirokazu Goto ,  Masaru Shinomiya ,  Keitaro Tsuchiya ,  Kazunori Hagimoto

IPC分类号： H01L29/36 ,  H01L29/66 ,  H01L21/225 ,  H01L21/02 ,  H01L29/778 ,  C30B23/02 ,  C30B25/18 ,  C30B29/40 ,  C30B29/06

CPC分类号： H01L21/02658 ,  C30B23/025 ,  C30B25/18 ,  C30B25/186 ,  C30B29/06 ,  C30B29/403 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0254 ,  H01L21/0259 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/2251 ,  H01L21/2258 ,  H01L29/36 ,  H01L29/66462 ,  H01L29/7786

摘要： A silicon-based substrate on which a nitride compound semiconductor layer is formed on a front surface thereof, including a first portion provided on the front surface side which has a first impurity concentration and a second portion provided on an inner side of the first portion which has a second impurity concentration higher than the first impurity concentration, wherein the first impurity concentration being 1×1014 atoms/atomscm3 or more and less than 1×1019 atoms/cm3. Consequently, there is provided the silicon-based substrate in which the crystallinity of the nitride compound semiconductor layer formed on an upper side thereof can be maintained excellently while improving a warpage of the substrate.

公开(公告)号：US20150084163A1

公开(公告)日：2015-03-26

申请号：US14397779

申请日：2013-04-19

申请人： SANKEN ELECTRIC CO., LTD. ,  SHIN-ETSU HANDOTAI CO., LTD.

发明人： Hiroshi Shikauchi ,  Hirokazu Goto ,  Ken Sato ,  Masaru Shinomiya ,  Keitaro Tsuchiya ,  Kazunori Hagimoto

IPC分类号： H01L23/00 ,  H01L29/20 ,  H01L21/02

CPC分类号： H01L23/562 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/02521 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/167 ,  H01L29/2003 ,  H01L29/7786 ,  H01L29/872 ,  H01L33/007 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides an epitaxial substrate including a silicon substrate containing oxygen atoms in concentrations of 4×1017 cm−3 or more and 6×1017 cm−3 or less and containing boron atoms in concentrations of 5×1018 cm−3 or more and 6×1019 cm−3 or less and a semiconductor layer that is placed on the silicon substrate and is made of a material having a thermal expansion coefficient different from the thermal expansion coefficient of the silicon substrate. As a result, the epitaxial substrate in which the occurrence of warpage caused by the stress between the silicon substrate and the semiconductor layer is suppressed is provided.

摘要翻译： 本发明提供一种外延基板，其包括含有浓度为4×1017cm-3以上且6×1017cm-3以下的含有氧原子的硅基板，其含有浓度为5×10 18 cm -3以上的硼原子， 6×10 19 cm -3以下的半导体层，以及设置在硅基板上的由与硅基板的热膨胀系数不同的热膨胀系数的材料构成的半导体层。 结果，提供抑制由硅衬底和半导体层之间的应力引起的翘曲发生的外延衬底。

公开(公告)号：US10553674B2

公开(公告)日：2020-02-04

申请号：US15741065

申请日：2016-06-17

申请人： SANKEN ELECTRIC CO., LTD. ,  SHIN-ETSU HANDOTAI CO., LTD.

发明人： Ken Sato ,  Hiroshi Shikauchi ,  Hirokazu Goto ,  Masaru Shinomiya ,  Keitaro Tsuchiya ,  Kazunori Hagimoto

IPC分类号： H01L21/02 ,  H01L29/06 ,  H01L29/778 ,  H01L29/66 ,  H01L29/207 ,  H01L29/20

摘要： A substrate for semiconductor device includes a substrate, a buffer layer which is provided on the substrate and made of a nitride semiconductor, and a device active layer which is provided on the buffer layer and composed of a nitride semiconductor layer, wherein the buffer layer contains carbon and iron, a carbon concentration of an upper surface of the buffer layer is higher than a carbon concentration of a lower surface of the buffer layer, and an iron concentration of the upper surface of the buffer layer is lower than an iron concentration of the lower surface of the buffer layer. As a result, the substrate for semiconductor device can reduce a leak current in a lateral direction at the time of a high-temperature operation while suppressing a leak current in a longitudinal direction.

公开(公告)号：US10068985B2

公开(公告)日：2018-09-04

申请号：US15300658

申请日：2015-03-05

申请人： SANKEN ELECTRIC CO., LTD. ,  SHIN-ETSU HANDOTAI CO., LTD.

发明人： Ken Sato ,  Hiroshi Shikauchi ,  Hirokazu Goto ,  Masaru Shinomiya ,  Keitaro Tsuchiya ,  Kazunori Hagimoto

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L29/205 ,  H01L21/283 ,  H01L29/423 ,  H01L21/02 ,  H01L29/20 ,  H01L29/207

摘要： A method for manufacturing a semiconductor substrate, the semiconductor substrate including: a substrate; an initial layer provided on the substrate; a high-resistance layer provided on the initial layer which is composed of a nitride-based semiconductor and contains carbon; and a channel layer provided on the high-resistance layer which is composed of a nitride-based semiconductor, and at a step of forming the high-resistance layer, a gradient is given to a preset temperature at which the semiconductor substrate is heated, and the high-resistance layer is formed such that the preset temperature at the start of formation of the high-resistance layer is different from the preset temperature at the end of formation of the high-resistance layer. It is possible to provide the method for manufacturing a semiconductor substrate, which can reduce a concentration gradient of carbon concentration in the high-resistance layer and also provide a desired value for the carbon concentration.

公开(公告)号：US09401420B2

公开(公告)日：2016-07-26

申请号：US14891942

申请日：2014-05-02

申请人： SANKEN ELECTRIC CO., LTD. ,  SHIN-ETSU HANDOTAI CO., LTD.

发明人： Hiroshi Shikauchi ,  Ken Sato ,  Hirokazu Goto ,  Masaru Shinomiya ,  Keitaro Tsuchiya ,  Kazunori Hagimoto

IPC分类号： H01L29/778 ,  H01L21/02 ,  H01L29/66 ,  H01L29/20 ,  H01L29/205

CPC分类号： H01L29/7783 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787

摘要： Semiconductor device including: silicon-based substrate; first buffer layer on silicon-based substrate and is formed of first layer containing Al composition and second layer containing less Al than the first layer, the first and second layers being alternately stacked; second buffer layer on the first buffer layer and is formed of third layer containing Al composition and fourth layer containing less Al than the third layer, the third and fourth layers being alternately stacked; and third buffer layer on the second buffer layer and is formed of fifth layer containing Al composition and sixth layer containing less Al than the fifth layer, the fifth and sixth layers being alternately stacked, wherein the second buffer layer contains more Al than the first and third buffer layers. Thus, the semiconductor device leakage can be suppressed while reducing stress which is applied to buffer layer and can improve flatness of active layer upper face.

摘要翻译： 半导体器件包括：硅基衬底; 第一缓冲层在硅基基板上，并且由含有Al组分的第一层和比第一层含有更少的Al的第二层形成，第一和第二层交替堆叠; 第二缓冲层在第一缓冲层上并且由含有Al组分的第三层和包含比第三层少的Al的第四层形成，第三和第四层交替堆叠; 和第三缓冲层，并且由第五层和第六层构成，第五层含有Al组分，第六层含有比第五层少的Al，第五层和第六层交替堆叠，其中第二缓冲层含有比第一层更多的Al， 第三缓冲层。 因此，可以抑制半导体器件泄漏，同时减小施加到缓冲层的应力并且可以提高有源层上表面的平坦度。

公开(公告)号：US20150028457A1

公开(公告)日：2015-01-29

申请号：US14376475

申请日：2013-02-14

申请人： SHIN-ETSU HANDOTAI CO., LTD.

发明人： Hiroshi Shikauchi ,  Hirokazu Goto ,  Ken Sato ,  Masaru Shinomiya ,  Keitaro Tsuchiya ,  Kazunori Hagimoto

IPC分类号： H01L21/322 ,  H01L29/34 ,  H01L29/20

CPC分类号： H01L21/3228 ,  C30B25/183 ,  C30B25/186 ,  C30B29/403 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/0254 ,  H01L21/02587 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/34 ,  H01L29/7786

摘要： The present invention includes: a silicon-based substrate; and an epitaxial growth layer that has a configuration in which first and second nitride semiconductor layers having different lattice constants and thermal expansion coefficients are alternately laminated, and is arranged on the silicon-based substrate so that a film thickness thereof is gradually reduced at an outer edge portion. As a result, there are provided an epitaxial substrate and a semiconductor device in which generation of cracks at the outer edge portion is suppressed, and a method for manufacturing the semiconductor device.

摘要翻译： 本发明包括：硅基基板; 以及外延生长层，其具有交替层叠具有不同晶格常数和热膨胀系数的第一和第二氮化物半导体层的配置，并且布置在硅基基板上，使得其膜厚在外部逐渐减小 边缘部分。 结果，提供了外延基板和半导体器件，其中外部边缘部分产生裂纹被抑制，以及制造半导体器件的方法。