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公开(公告)号：US08981540B2
公开(公告)日：2015-03-17
申请号：US13922904
申请日：2013-06-20
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Cheng-Yu Chiang , Wen-Jung Chiang , Hsing-Hung Lee
IPC: H01L23/495
CPC classification number: H01L23/495 , H01L23/49548 , H01L23/49589 , H01L23/49827 , H01L23/50 , H01L2224/32245 , H01L2224/48247 , H01L2224/49109 , H01L2224/73265 , H01L2924/00
Abstract: A package structure is disclosed, which includes: a carrier having a recessed portion formed on a lower side thereof and filled with a dielectric material; a semiconductor element disposed on an upper side of the carrier and electrically connected to the carrier; and an encapsulant formed on the upper side of the carrier for encapsulating the semiconductor element. Therein, the dielectric material is exposed from the encapsulant. As such, when the carrier is disposed on a circuit board, the dielectric material is sandwiched between the lower side of the carrier and the circuit board to form a decoupling capacitor, thereby improving the power integrity.
Abstract translation: 公开了一种封装结构，其包括：具有形成在其下侧并填充有电介质材料的凹部的载体; 半导体元件，其设置在所述载体的上侧并电连接到所述载体; 以及密封剂，其形成在用于封装半导体元件的载体的上侧。 其中，电介质材料从密封剂暴露出来。 因此，当载体设置在电路板上时，电介质材料夹在载体的下侧和电路板之间以形成去耦电容器，从而提高电力完整性。
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公开(公告)号：US09305885B2
公开(公告)日：2016-04-05
申请号：US13960064
申请日：2013-08-06
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Tai-Tsung Hsu , Cheng-Yu Chiang , Miao-Wen Chen , Wen-Jung Chiang , Hsin-Hung Lee
IPC: H01L23/552 , H01L21/00 , H01L23/31 , H01L23/36 , H01L25/065 , H01L21/56
CPC classification number: H01L21/56 , H01L21/428 , H01L21/565 , H01L23/3121 , H01L23/36 , H01L23/3675 , H01L23/552 , H01L23/585 , H01L25/0655 , H01L2224/16225 , H01L2224/48227 , H01L2924/1815
Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
Abstract translation: 提供一种多芯片封装结构，包括具有接地结构的基板; 两个半导体元件设置在基板上并与其电连接; 形成在所述基板上并封装半导体元件的密封剂，其中所述密封剂具有形成在所述半导体元件之间的多个圆形孔; 以及形成在每个圆孔中的电磁屏蔽结构，并连接到接地结构以实现电磁屏蔽效果。 还提供了一种用于形成多芯片封装的方法。
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公开(公告)号：US20150123251A1
公开(公告)日：2015-05-07
申请号：US14133842
申请日：2013-12-19
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
Inventor： Chih-Hsien Chiu , Chia-Yang Chen , Tsung-Hsien Tsai , Heng-Cheng Chu , Cheng-Yu Chiang
IPC: H01L23/552 , H01L23/31
CPC classification number: H01L23/552 , H01L23/31 , H01L23/3121 , H01L24/16 , H01L24/48 , H01L2224/16225 , H01L2224/16245 , H01L2224/48227 , H01L2224/48247 , H01L2924/00014 , H01L2924/3011 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package is disclosed, which includes: a packaging structure having at least a semiconductor element; and at least three shielding layers sequentially stacked on the packaging structure so as to cover the semiconductor element, wherein a middle layer of the shielding layers is lower in electrical conductivity than adjacent shielding layers on both sides of the middle layer, thereby reducing electromagnetic interferences so as to increase the shielding effectiveness.
Abstract translation: 公开了一种半导体封装，其包括：具有至少半导体元件的封装结构; 以及至少三个屏蔽层，其顺序堆叠在所述封装结构上以覆盖所述半导体元件，其中所述屏蔽层的中间层的导电性低于所述中间层的两侧上的相邻屏蔽层，从而降低电磁干扰 以提高屏蔽效能。
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公开(公告)号：US20140231972A1
公开(公告)日：2014-08-21
申请号：US13960064
申请日：2013-08-06
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Tai-Tsung Hsu , Cheng-Yu Chiang , Miao-Wen Chen , Wen-Jung Chiang , Hsin-Hung Lee
IPC: H01L23/552 , H01L21/56
CPC classification number: H01L21/56 , H01L21/428 , H01L21/565 , H01L23/3121 , H01L23/36 , H01L23/3675 , H01L23/552 , H01L23/585 , H01L25/0655 , H01L2224/16225 , H01L2224/48227 , H01L2924/1815
Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
Abstract translation: 提供一种多芯片封装结构，包括具有接地结构的基板; 两个半导体元件设置在基板上并与其电连接; 形成在所述基板上并封装半导体元件的密封剂，其中所述密封剂具有形成在所述半导体元件之间的多个圆形孔; 以及形成在每个圆孔中的电磁屏蔽结构，并连接到接地结构以实现电磁屏蔽效果。 还提供了一种用于形成多芯片封装的方法。
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公开(公告)号：US09627748B2
公开(公告)日：2017-04-18
申请号：US14151184
申请日：2014-01-09
Applicant: Siliconware Precision Industries Co., Ltd
Inventor： Chih-Hsien Chiu , Heng-Cheng Chu , Cheng-Yu Chiang
CPC classification number: H01Q9/0421 , H01Q1/38 , H01Q1/40
Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
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Patent Agency Ranking
公开(公告)号：US20160181126A1
公开(公告)日：2016-06-23
申请号：US15054845
申请日：2016-02-26
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Tai-Tsung Hsu , Cheng-Yu Chiang , Miao-Wen Chen , Wen-Jung Chiang , Hsin-Hung Lee
IPC: H01L21/56 , H01L21/428 , H01L23/58 , H01L23/367 , H01L23/552
CPC classification number: H01L21/56 , H01L21/428 , H01L21/565 , H01L23/3121 , H01L23/36 , H01L23/3675 , H01L23/552 , H01L23/585 , H01L25/0655 , H01L2224/16225 , H01L2224/48227 , H01L2924/1815
Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
Abstract translation: 提供一种多芯片封装结构，包括具有接地结构的基板; 两个半导体元件设置在基板上并与其电连接; 形成在所述基板上并封装半导体元件的密封剂，其中所述密封剂具有形成在所述半导体元件之间的多个圆形孔; 以及形成在每个圆孔中的电磁屏蔽结构，并连接到接地结构以实现电磁屏蔽效果。 还提供了一种用于形成多芯片封装的方法。
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公开(公告)号：US20140225241A1
公开(公告)日：2014-08-14
申请号：US13922904
申请日：2013-06-20
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Cheng-Yu Chiang , Wen-Jung Chiang , Hsing-Hung Lee
IPC: H01L23/495
CPC classification number: H01L23/495 , H01L23/49548 , H01L23/49589 , H01L23/49827 , H01L23/50 , H01L2224/32245 , H01L2224/48247 , H01L2224/49109 , H01L2224/73265 , H01L2924/00
Abstract: A package structure is disclosed, which includes: a carrier having a recessed portion formed on a lower side thereof and filled with a dielectric material; a semiconductor element disposed on an upper side of the carrier and electrically connected to the carrier; and an encapsulant formed on the upper side of the carrier for encapsulating the semiconductor element. Therein, the dielectric material is exposed from the encapsulant. As such, when the carrier is disposed on a circuit board, the dielectric material is sandwiched between the lower side of the carrier and the circuit board to form a decoupling capacitor, thereby improving the power integrity.
Abstract translation: 公开了一种封装结构，其包括：具有形成在其下侧并填充有电介质材料的凹部的载体; 半导体元件，其设置在所述载体的上侧并电连接到所述载体; 以及密封剂，其形成在用于封装半导体元件的载体的上侧。 其中，电介质材料从密封剂暴露出来。 因此，当载体设置在电路板上时，电介质材料夹在载体的下侧和电路板之间以形成去耦电容器，从而提高电力完整性。
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公开(公告)号：US10199731B2
公开(公告)日：2019-02-05
申请号：US15455664
申请日：2017-03-10
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Chih-Hsien Chiu , Heng-Cheng Chu , Cheng-Yu Chiang
Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
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公开(公告)号：US09887102B2
公开(公告)日：2018-02-06
申请号：US15054845
申请日：2016-02-26
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Tai-Tsung Hsu , Cheng-Yu Chiang , Miao-Wen Chen , Wen-Jung Chiang , Hsin-Hung Lee
IPC: H01L21/56 , H01L23/36 , H01L23/552 , H01L23/31 , H01L21/428 , H01L23/367 , H01L23/58 , H01L25/065
CPC classification number: H01L21/56 , H01L21/428 , H01L21/565 , H01L23/3121 , H01L23/36 , H01L23/3675 , H01L23/552 , H01L23/585 , H01L25/0655 , H01L2224/16225 , H01L2224/48227 , H01L2924/1815
Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
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公开(公告)号：US20170187117A1
公开(公告)日：2017-06-29
申请号：US15455664
申请日：2017-03-10
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Chih-Hsien Chiu , Heng-Cheng Chu , Cheng-Yu Chiang
CPC classification number: H01Q9/0421 , H01Q1/38 , H01Q1/40
Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
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