公开(公告)号：US10483955B2

公开(公告)日：2019-11-19

申请号：US16030013

申请日：2018-07-09

Applicant: SK hynix Inc.

Inventor： Dong Hyun Kim ,  Soon Ku Kang ,  Bo Ram Kim

IPC: H03K5/13 ,  H03L7/06 ,  H03K5/1534 ,  H03L7/089 ,  H03K19/00

Abstract: The feedback system includes an input signal generation circuit configured to output an input signal having a level corresponding to a code signal inputted thereto and a lock signal generation circuit configured to output the code signal for controlling a level of the input signal using two reference signals, to generate count data acquired by counting time from when the level of the input signal reaches between levels of the two reference signals to when the level of the input signal becomes higher or lower than the level of any one of the two reference signals, and to output a lock signal for fixing the level of the input signal after time corresponding to a rounded value of a quotient of the count data divided by 2.

公开(公告)号：US09859910B1

公开(公告)日：2018-01-02

申请号：US15632648

申请日：2017-06-26

Applicant: SK hynix Inc.

Inventor： Dong Hyun Kim ,  Soon Ku Kang ,  Kwan Su Shon ,  Yo Han Jeong ,  Eun Ji Choi

IPC: H03M1/34 ,  H03M1/12 ,  H04N5/374 ,  H04N5/378 ,  H03M1/06 ,  H03K5/24 ,  H03M1/56 ,  H03M1/10 ,  H03M1/80 ,  H03M1/00

CPC classification number: H03M1/1295 ,  H03K5/2481 ,  H03K5/249 ,  H03M1/00 ,  H03M1/0607 ,  H03M1/0678 ,  H03M1/1019 ,  H03M1/12 ,  H03M1/462 ,  H03M1/56 ,  H03M1/804 ,  H04N5/3742 ,  H04N5/378

Abstract: An analog to digital converter includes a first DAC unit configured to vary a level of a reference voltage output through a first node according to a first code, a second DAC unit coupled in parallel to the first DAC unit on the basis of the first node and configured to vary the level of the reference voltage according to a second code, a comparator configured to generate a comparison result signal by comparing an input voltage and the reference voltage, and at least one register array configured to store the first code and the second code with initial values and store the first code and the second code by varying values of the first code and the second code according to the comparison result signal.

公开(公告)号：US20190158081A1

公开(公告)日：2019-05-23

申请号：US16030013

申请日：2018-07-09

Applicant: SK hynix Inc.

Inventor： Dong Hyun Kim ,  Soon Ku Kang ,  Bo Ram Kim

IPC: H03K5/1534 ,  H03K5/13

CPC classification number: H03K5/1534 ,  H03K5/13 ,  H03K19/0005 ,  H03L7/089

Abstract: The feedback system includes an input signal generation circuit configured to output an input signal having a level corresponding to a code signal inputted thereto and a lock signal generation circuit configured to output the code signal for controlling a level of the input signal using two reference signals, to generate count data acquired by counting time from when the level of the input signal reaches between levels of the two reference signals to when the level of the input signal becomes higher or lower than the level of any one of the two reference signals, and to output a lock signal for fixing the level of the input signal after time corresponding to a rounded value of a quotient of the count data divided by 2.

公开(公告)号：US10284156B2

公开(公告)日：2019-05-07

申请号：US15668097

申请日：2017-08-03

Applicant: SK hynix Inc.

Inventor： Dong Hyun Kim ,  Eun Ji Choi ,  Yo Han Jeong ,  Soon Ku Kang ,  Woo Jin Kang ,  Kwan Su Shon ,  Hyun Bae Lee ,  Tae Jin Hwang

IPC: H03F3/45 ,  G05F1/565 ,  H03M1/00

Abstract: An amplifier may include a differential pair circuit configured to generate an output signal according to a first input signal and a second input signal, a plurality of current sinks coupled between a ground terminal and the differential pair circuit, and a feedback circuit configured to sense a level of the output signal and generate a feedback signal. At least one of the plurality of current sinks is controlled according to the feedback signal.