公开(公告)号：US10796942B2

公开(公告)日：2020-10-06

申请号：US16105403

申请日：2018-08-20

申请人： STMICROELECTRONICS S.r.l.

发明人： Simone Dario Mariani ,  Fabrizio Fausto Renzo Toia ,  Marco Sambi ,  Davide Giuseppe Patti ,  Marco Morelli ,  Giuseppe Barillaro

IPC分类号： H01L29/78 ,  H01L21/762 ,  H01L21/02 ,  H01L21/306 ,  H01L29/06

摘要： A technique to make silicon oxide regions from porous silicon and related semiconductor structures are disclosed. The porous silicon is made in situ by anodizing P doped silicon regions. Thus, the shape and profile of the oxide regions may be controlled by controlling the shape and profile of the P doped silicon regions.

公开(公告)号：US10930799B2

公开(公告)日：2021-02-23

申请号：US16246945

申请日：2019-01-14

申请人： STMicroelectronics S.r.l.

发明人： Flavio Francesco Villa ,  Marco Morelli ,  Marco Marchesi ,  Simone Dario Mariani ,  Fabrizio Fausto Renzo Toia

IPC分类号： H01L29/94 ,  H01L29/66 ,  H01L27/06 ,  H01L49/02 ,  H01L21/02

摘要： A semiconductor body includes a front side and a back side and is configured to support an electronic circuit. A buried region is provided in the semiconductor body at a location between the electronic circuit and the back side. The buried region includes a layer of conductive material and a dielectric layer, where the dielectric layer is arranged between the layer of conductive material and the semiconductor body. A conductive path extends between the buried region and the front side to form a path for electrical access to the layer of conductive material. A capacitor is thus formed with the layer of conductive material providing a capacitor plate and the dielectric layer providing the capacitor dielectric. A further capacitor plate is provided by the semiconductor body, or by a further layer of conductive material in the buried region.

公开(公告)号：US20170250253A1

公开(公告)日：2017-08-31

申请号：US15250638

申请日：2016-08-29

申请人： STMICROELECTRONICS S.R.L.

发明人： Fabrizio Fausto Renzo Toia ,  Claudio Contiero ,  Elisabetta Pizzi ,  Simone Dario Mariani

IPC分类号： H01L29/10 ,  H01L29/40 ,  H01L29/78

CPC分类号： H01L29/1087 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/02664 ,  H01L21/3247 ,  H01L21/74 ,  H01L21/743 ,  H01L23/535 ,  H01L29/1083 ,  H01L29/401 ,  H01L29/7802

摘要： A semiconductor device comprising: a semiconductor body including an active region that houses an electronic component and a passive dielectric region surrounding the active region; a conductive buried region, of metallic material or metallic alloy, which extends in the semiconductor body in the active region; and one or more electrical contacts, of metallic material, which extend between the conductive buried region and a top surface of the semiconductor body, and form respective paths for electrical access to the conductive buried region.

公开(公告)号：US09640614B2

公开(公告)日：2017-05-02

申请号：US14509229

申请日：2014-10-08

申请人： STMicroelectronics S.r.l.

发明人： Alessandro Causio ,  Paolo Colpani ,  Simone Dario Mariani

IPC分类号： H01L29/78 ,  H01L29/51 ,  H01L29/06 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/0653 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/0922 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/7816

摘要： An integrated device includes a semiconductor body including an STI insulating structure that laterally delimits first active areas and at least one second active area in a low-voltage region and in a power region of the semiconductor body, respectively. Low-voltage CMOS components are housed in the first active areas. A power component, formed in the second active area, includes a source region, a body region, a drain-contact region, and at least one LOCOS insulation region. The insulating region is arranged between the body region and the drain-contact region and has a prominent portion that emerges from a surface of the semiconductor body, and an embedded portion inside it. The prominent portion of the LOCOS insulation region has a volume greater than that of the embedded portion.

公开(公告)号：US20150054088A1

公开(公告)日：2015-02-26

申请号：US14509229

申请日：2014-10-08

申请人： STMICROELECTRONICS S.R.L.

发明人： Alessandro Causio ,  Paolo Colpani ,  Simone Dario Mariani

IPC分类号： H01L29/06

CPC分类号： H01L29/0653 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/0922 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/7816

摘要： An integrated device includes a semiconductor body including an STI insulating structure that laterally delimits first active areas and at least one second active area in a low-voltage region and in a power region of the semiconductor body, respectively. Low-voltage CMOS components are housed in the first active areas. A power component, formed in the second active area, includes a source region, a body region, a drain-contact region, and at least one LOCOS insulation region. The insulating region is arranged between the body region and the drain-contact region and has a prominent portion that emerges from a surface of the semiconductor body, and an embedded portion inside it. The prominent portion of the LOCOS insulation region has a volume greater than that of the embedded portion.

摘要翻译： 集成器件包括分别在半导体本体的低电压区域和功率区域中横向限定第一有源区和至少一个第二有源区的STI绝缘结构的半导体本体。 低压CMOS元件容纳在第一个有源区域中。 形成在第二有源区域中的功率部件包括源极区域，主体区域，漏极接触区域以及至少一个LOCOS绝缘区域。 绝缘区域布置在体区域和漏极 - 接触区域之间，并且具有从半导体主体的表面露出的突出部分和其内部的嵌入部分。 LOCOS绝缘区域的突出部分的体积大于嵌入部分的体积。

公开(公告)号：US11887948B2

公开(公告)日：2024-01-30

申请号：US17391192

申请日：2021-08-02

申请人： STMicroelectronics S.r.l.

发明人： Simone Dario Mariani ,  Elisabetta Pizzi ,  Daria Doria

IPC分类号： H01L23/00 ,  H01L21/56

CPC分类号： H01L24/05 ,  H01L21/56 ,  H01L24/03 ,  H01L24/13 ,  H01L24/45 ,  H01L2224/0219 ,  H01L2224/02181 ,  H01L2224/03019 ,  H01L2224/0382 ,  H01L2224/05582 ,  H01L2224/05624 ,  H01L2224/05647

摘要： A back end of line (BEOL) structure for an integrated circuit chip includes a last metal structure providing a bonding pad. A passivation structure over the bonding pad includes a first opening extending exposing an upper surface of the bonding pad. A conformal nitride layer extends over the passivation structure and is placed in contact with the upper surface of the bonding pad. An insulator material layer covers the conformal nitride layer and includes a second opening that extends through both the insulator material layer and the conformal nitride layer. A foot portion of the conformal nitride layer on the upper surface of the bonding pad is self-aligned with the second opening.

公开(公告)号：US11469136B2

公开(公告)日：2022-10-11

申请号：US17001295

申请日：2020-08-24

申请人： STMICROELECTRONICS S.r.l.

发明人： Simone Dario Mariani ,  Fabrizio Fausto Renzo Toia ,  Marco Sambi ,  Davide Giuseppe Patti ,  Marco Morelli ,  Giuseppe Barillaro

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/02 ,  H01L21/306 ,  H01L29/06 ,  H01L29/78

摘要： A technique to make silicon oxide regions from porous silicon and related semiconductor structures is disclosed. The porous silicon is made in situ by anodizing P doped silicon regions. Thus, the shape and profile of the oxide regions may be controlled by controlling the shape and profile of the P doped silicon regions.

公开(公告)号：US10062757B2

公开(公告)日：2018-08-28

申请号：US15250638

申请日：2016-08-29

申请人： STMICROELECTRONICS S.R.L.

发明人： Fabrizio Fausto Renzo Toia ,  Claudio Contiero ,  Elisabetta Pizzi ,  Simone Dario Mariani

IPC分类号： H01L23/58 ,  H01L29/10 ,  H01L29/78 ,  H01L29/40 ,  H01L21/02 ,  H01L21/324 ,  H01L23/535 ,  H01L21/74

CPC分类号： H01L29/1087 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/02664 ,  H01L21/3247 ,  H01L21/74 ,  H01L21/743 ,  H01L23/535 ,  H01L29/1083 ,  H01L29/401 ,  H01L29/7802

摘要： A semiconductor device includes: a semiconductor body including an active region that houses an electronic component and a passive dielectric region surrounding the active region; a conductive buried region, of metallic material or metallic alloy, which extends in the semiconductor body in the active region; and one or more electrical contacts, of metallic material, which extend between the conductive buried region and a top surface of the semiconductor body, and form respective paths for electrical access to the conductive buried region.