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    EMBEDDED NON-VOLATILE MEMORY WITH SINGLE POLYSILICON LAYER MEMORY CELLS ERASABLE THROUGH BAND TO BAND TUNNELING INDUCED HOT ELECTRON AND PROGRAMMABLE THROUGH FOWLER-NORDHEIM TUNNELING
    2.
    发明申请
    EMBEDDED NON-VOLATILE MEMORY WITH SINGLE POLYSILICON LAYER MEMORY CELLS ERASABLE THROUGH BAND TO BAND TUNNELING INDUCED HOT ELECTRON AND PROGRAMMABLE THROUGH FOWLER-NORDHEIM TUNNELING 审中-公开
    嵌入式非易失性存储器，具有单层多层记忆细胞，通过带状隧道诱导热电子可擦除，可编程通过FOWLER-NORDHEIM隧道

    公开(公告)号：US20150221661A1

    公开(公告)日：2015-08-06

    申请号：US14605303

    申请日：2015-01-26

    申请人： STMICROELECTRONICS S.r.l.

    发明人： Luca MILANI ,  Fabrizio TORRICELLI ,  Anna Richelli ,  Luigi Colalongo ,  Zsolt Miklos Kovàcs-Vajna

    IPC分类号： H01L27/115

    CPC分类号： H01L27/11521 ,  H01L27/11519 ,  H01L27/11558 ,  H01L27/1156 ,  H01L29/66825 ,  H01L29/7881

    摘要： A non-volatile memory includes cells arranged in rows and columns. Each memory cell includes an access portion and a control portion. The access and control portions share an electrically floating layer of conductive material defining a first capacitive coupling with the access portion and a second capacitive coupling with the control portion. The first capacitive coupling defines a first capacity lower than a second capacity defined by the second capacitive coupling. The control portion is configured so that an electric current extracts charge carriers from the electrically floating layer through Fowler-Nordheim tunneling to store a first logic value in the memory cell. The access portion is configured so that an electric current injects charge carriers in the electrically floating layer by injection of band-to-band tunneling-induced hot electrons to store a second logic value, respectively, in the memory cell.

    摘要翻译： 非易失性存储器包括以行和列排列的单元。 每个存储单元包括访问部分和控制部分。 访问和控制部分共享导电材料的电浮置层，其限定了与访问部分的第一电容耦合和与控制部分的第二电容耦合。 第一电容耦合限定了低于由第二电容耦合限定的第二容量的第一容量。 控制部分被配置成使得电流通过Fowler-Nordheim隧道从电浮置层提取电荷载流子，以将第一逻辑值存储在存储器单元中。 访问部分被配置为使得电流通过注入频带隧穿感应的热电子而分别在存储单元中存储第二逻辑值来在电浮置层中注入电荷载流子。

    Embedded non-volatile memory with single polysilicon layer memory cells programmable through channel hot electrons and erasable through fowler-nordheim tunneling
    3.
    发明授权
    Embedded non-volatile memory with single polysilicon layer memory cells programmable through channel hot electrons and erasable through fowler-nordheim tunneling 有权
    嵌入式非易失性存储器，单个多晶硅层存储单元可通过通道热电子编程，并可通过fowler-nordheim隧道进行擦除

    公开(公告)号：US09368209B2

    公开(公告)日：2016-06-14

    申请号：US14605246

    申请日：2015-01-26

    申请人： STMICROELECTRONICS S.R.L.

    发明人： Luca Milani ,  Fabrizio Torricelli ,  Anna Richelli ,  Luigi Colalongo ,  Zsolt Miklos Kovàcs-Vajna

    IPC分类号： G11C16/10 ,  G11C16/04 ,  H01L27/115 ,  H01L21/28 ,  H01L29/66 ,  H01L29/788

    CPC分类号： G11C16/0408 ,  H01L21/28273 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11558 ,  H01L29/66825 ,  H01L29/7881

    摘要： A non-volatile memory includes memory cells arranged in rows and columns. Each memory cell includes a program/read portion and an erase portion that share an electrically floating layer of conductive material defining a first capacitive coupling with the program/read portion and a second capacitive coupling with the erase portion. The first capacitive coupling defines a first capacitance greater than a second capacitance defined by the second capacitive coupling. The erase portion is configured so that an electric current extracts charge carriers from the electrically floating layer to store a first logic value in the memory cell. The program/read portion is further configured so that an electric current injects charge carriers in the electrically floating layer to store a second logic value in the memory cell.

    摘要翻译： 非易失性存储器包括以行和列排列的存储单元。 每个存储器单元包括程序/读取部分和擦除部分，其共享限定与程序/读取部分的第一电容耦合的导电材料的电浮置层和与擦除部分的第二电容耦合。 第一电容耦合限定大于由第二电容耦合限定的第二电容的第一电容。 擦除部分被配置为使得电流从电浮动层提取电荷载流子以将第一逻辑值存储在存储器单元中。 程序/读取部分被进一步配置成使得电流注入电浮置层中的电荷载流子以将第二逻辑值存储在存储单元中。

    Non-volatile memory device with single-polysilicon-layer memory cells
    6.
    发明授权
    Non-volatile memory device with single-polysilicon-layer memory cells 有权
    具有单多晶硅层存储单元的非易失性存储器件

    公开(公告)号：US08873291B2

    公开(公告)日：2014-10-28

    申请号：US13926280

    申请日：2013-06-25

    申请人： STMicroelectronics S.r.l.

    发明人： Fabrizio Torricelli ,  Luigi Colalongo ,  Anna Richelli ,  Zsolt Kovàcs-Vajna

    IPC分类号： G11C11/34 ,  H01L29/423 ,  H01L29/788 ,  G11C16/04

    CPC分类号： G11C16/0425 ,  H01L29/42324 ,  H01L29/7881

    摘要： An embodiment of a nonvolatile-memory device includes: a body accommodating at least a first semiconductor well and a second semiconductor well; an insulating structure; and at least one nonvolatile memory cell. The cell includes: at least one first control region in the first well; conduction regions in the second well; and a floating gate region, which extends over portions of the first well and of the second well, is capacitively coupled to the first control region and forms a floating-gate memory transistor with the conduction regions. The insulating structure includes: first insulating regions, which separate the floating gate region from the first control region and from the second well outside the conduction regions and have a first thickness; and second insulating regions, which separate the floating gate region from the first well outside the first control region and have a second thickness greater than the first thickness.

    摘要翻译： 非易失性存储器件的一个实施例包括：容纳至少第一半导体阱和第二半导体阱的主体; 绝缘结构; 和至少一个非易失性存储单元。 电池包括：第一阱中的至少一个第一控制区; 第二井的导电区域; 并且在第一阱和第二阱的部分上延伸的浮动栅极区域电容耦合到第一控制区域并且形成具有导电区域的浮栅存储器晶体管。 所述绝缘结构包括：第一绝缘区域，其将所述浮动栅极区域与所述第一控制区域分离，并且从所述第二阱阱区分开所述导电区域并具有第一厚度; 以及第二绝缘区域，其将浮置栅极区域与第一阱的第一控制区域外部分离，并且具有大于第一厚度的第二厚度。