摘要:
A wafer-scale multiple carbon nanotube transfer process is provided. According to one embodiment of the invention, plasma exposure processes are performed at various stages of the fabrication process of a carbon nanotube device or article to improve feasibility and yield for successive transfers of nanotubes. In one such carbon nanotube transfer process, a carrier material is partially etched by a plasma process before removing the carrier material through, for example, a wet etch. By applying the subject plasma exposure processes, fabrication of ultra-high-density nanotubes and ultra-high-density nanotube grids or fabrics is facilitated. The ultra-high-density nanotubes and ultra-high-density nanotube grids or fabrics fabricated utilizing embodiments of the invention can be used, for example, to make high-performance carbon nanotube field effect transistors (CNFETs) and low cost, highly-transparent, and low-resistivity electrodes for solar cell and flat panel display applications. Further, three-dimensional CNFETs can be provided by utilizing the subject plasma exposure processes.
摘要:
A wafer-scale multiple carbon nanotube transfer process is provided. According to one embodiment of the invention, plasma exposure processes are performed at various stages of the fabrication process of a carbon nanotube device or article to improve feasibility and yield for successive transfers of nanotubes. In one such carbon nanotube transfer process, a carrier material is partially etched by a plasma process before removing the carrier material through, for example, a wet etch. By applying the subject plasma exposure processes, fabrication of ultra-high-density nanotubes and ultra-high-density nanotube grids or fabrics is facilitated. The ultra-high-density nanotubes and ultra-high-density nanotube grids or fabrics fabricated utilizing embodiments of the invention can be used, for example, to make high-performance carbon nanotube field effect transistors (CNFETs) and low cost, highly-transparent, and low-resistivity electrodes for solar cell and flat panel display applications. Further, three-dimensional CNFETs can be provided by utilizing the subject plasma exposure processes.
摘要:
Electronic devices may include monochrome image sensors having multi-storage-node image sensor pixels. A multi-storage-node image pixel may be synchronized with artificial light sources of different colors and may include a floating diffusion region and multiple storage regions. The image pixels may be sequentially exposed to each light color and may store charge associated with each color in each of the different storage regions. After exposure, the stored charge may be transferred to the floating diffusion region and subsequently read out using readout circuitry. The image pixel may have one set of storage gates that can perform both storage and transfer functions. Alternatively, the image pixel may have a first set of transfer gates for transferring charge to the storage regions and a second set of transfer gates for transferring charge from the storage regions to the floating diffusion region.
摘要:
Structured light imaging method and systems are described. An imaging method generates a stream of light pulses, converts the stream after reflection by a scene to charge, stores charge converted during the light pulses to a first storage element, and stores charge converted between light pulses to a second storage element. A structured light image system includes an illumination source that generates a stream of light pulses and an image sensor. The image sensor includes a photodiode, first and second storage elements, first and second switches, and a controller that synchronizes the image sensor to the illumination source and actuates the first and second switches to couple the first storage element to the photodiode to store charge converted during the light pulses and to couple the second storage element to the photodiode to store charge converted between the light pulses.
摘要:
The invention describes a solid-state CMOS image sensor array and discloses image sensor array pixels with global and rolling shutter capabilities that utilize multiple BCMD transistors for a single photodiode, for charge storage and sensing. Thus, the valuable pixel area saved by employing the BCMD transistor for charge storage and sensing is used by placing several BCMD transistors coupled to one photodiode. This increases the Dynamic Range (DR) of the sensor, since the same photodiode can integrate charge for different integration times, both long and short. This allows sensing of two different image signals from a single pixel without saturation, a low level signal with long integration time followed by a high level signal with short integration time. The signal processing circuits located at the periphery of the array can then process these signals into a single Wide Dynamic Range (WDR) output. Further disclosed is an image sensor array with pixels that use BCMD transistors for charge storage and sensing having multiple concentric gates, which allows changing the conversion gain of the BCMD transistors by applying various biases to the gates. Variable conversion gain is a useful feature when building WDR sensors since low conversion gain and high well capacity allows detection of high level signals and the same structure can be used to detect, at the same time, low level signals with high conversion gain and thus low noise.
摘要:
A pixel circuit includes a photosensor and a floating diffusion node. A circuit is coupled to the floating diffusion node, for selectively providing a pixel output signal to a column line. A reset circuit, which resets the floating diffusion node, is configured to be activated by the column line. A pullup circuit is included for controlling the reset circuit through a signal on the column line. A discharge circuit, which is separate from the reset circuit, is used for discharging the pixel output signal on the column line. The discharge circuit includes a transistor having a first source/drain terminal coupled to the column line and a second source/drain terminal coupled to a fixed voltage level. The gate of the transistor activates the discharging of the column line.
摘要:
High dynamic range imaging techniques with multi-storage pixels are provided. Multiple images may be captured during a single exposure using an image sensor with multi-storage pixels. During a single exposure, charge from photodiodes may be transferred alternately to multiple storage nodes of the multi-storage pixels. During readout of a multi-storage pixel, charge may be transferred from each of multiple storage nodes one at a time to a floating diffusion node. Each subsequent transfer of charge may be summed with the charge already stored in the floating diffusion node. A pixel signal may be read out from the multi-storage pixel after each charge transfer. Images formed from the pixel signals may be combined to produce a high dynamic range image.
摘要:
The present invention relates to a pumped pixel that includes a first photo-diode accumulating charge in response to impinging photons, a second photo-diode and a floating diffusion positioned on a substrate of the pixel. The pixel also includes a charge barrier positioned on the substrate between the first photo-diode and the second photo-diode, where the charge barrier temporarily blocks charge transfer between the first photo-diode and the second photo-diode. Also included is a pump gate positioned on the substrate adjacent to the charge barrier. The pump gate pumps the accumulated charge from the first photo-diode to the second photo-diode through the charge barrier in response to a pump voltage applied by a controller. Also included is a transfer gate positioned on the substrate between the second photo-diode and the floating diffusion. The transfer gate transfers the pumped charge from the second photo-diode to the floating diffusion in response to a transfer voltage applied by a controller.
摘要:
An imaging system may include imaging pixels. Each imaging pixel may include floating diffusion metal lines associated with a floating diffusion node in that imaging pixel, pixel output metal lines associated with a pixel output, and additional metal lines. The floating diffusion metal lines node may be at least partially surrounded by the pixel output metal lines. Because the floating diffusion metal lines are at least partially surrounded by the pixel output metal lines, the parasitic capacitance between the floating diffusion metal lines and the additional metal lines may be reduced. A source-follower transistor in each imaging pixel may provide a gain between the floating diffusion metal lines and the pixel output metal lines. Due to the Miller effect, the gain induced by the source-follower transistor may reduce the parasitic capacitance between the floating diffusion metal lines and the pixel output metal lines.
摘要:
An imaging system may include imaging pixels. Each imaging pixel may include floating diffusion metal lines associated with a floating diffusion node in that imaging pixel, pixel output metal lines associated with a pixel output, and additional metal lines. The floating diffusion metal lines node may be at least partially surrounded by the pixel output metal lines. Because the floating diffusion metal lines are at least partially surrounded by the pixel output metal lines, the parasitic capacitance between the floating diffusion metal lines and the additional metal lines may be reduced. A source-follower transistor in each imaging pixel may provide a gain between the floating diffusion metal lines and the pixel output metal lines. Due to the Miller effect, the gain induced by the source-follower transistor may reduce the parasitic capacitance between the floating diffusion metal lines and the pixel output metal lines.