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1.发明申请公开(公告)号：US20250071894A1
公开(公告)日：2025-02-27
申请号：US18848555
申请日：2023-03-20
Inventor： Hiroshi UEDA , Ichiro KUWAYAMA , Suguru YAMAGISHI , Toshiki IWASAKI , Akihiro YANO , Takuma YAMAMOTO
Abstract: The printed wiring board substrate includes an insulating layer, a first copper foil, and a second copper foil. The insulating layer has a first main surface and a second main surface opposite to the first main surface. The insulating layer includes a plurality of polyimide layers and a plurality of fluororesin layers. The total number of the plurality of polyimide layers and the plurality of fluororesin layers is 5 or more. Each of the plurality of polyimide layers and each of the plurality of fluororesin layers are alternately stacked along a thickness direction of the insulating layer. One of the plurality of fluororesin layers constitutes a first outermost layer which is an outermost layer on the side of the first main surface. Another one of the plurality of fluororesin layers constitutes a second outermost layer which is an outermost layer on the side of the second main surface.
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公开(公告)号：US20230019563A1
公开(公告)日：2023-01-19
申请号：US17783138
申请日：2021-05-10
Inventor： Koji NITTA , Takafumi UEMIYA , Suguru YAMAGISHI , Shigeki SHIMADA , Hiroshi UEDA , Satoshi KIYA
Abstract: A high-frequency circuit includes a first electric conductor layer, a first dielectric layer, a circuit layer, a second dielectric layer, a second electric conductor layer arranged in this order, and the circuit layer includes a ground pattern and a transmission line of a high-frequency signal. An electromagnetic wave shield is disposed around the transmission line. The electromagnetic wave shield includes a ground electric conductor on inner surfaces of a plurality of holes extending through the first dielectric layer, the ground pattern, the second dielectric layer, the first electric conductor layer, and the second electric conductor layer. The plurality of holes are a plurality of elongated holes provided at an interval in a direction in which the transmission line is surrounded. In each of the plurality of elongated holes, a longitudinal dimension in the direction in which the transmission line is surrounded is larger than a width dimension.
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3.发明申请公开(公告)号：US20180124925A1
公开(公告)日：2018-05-03
申请号：US15572506
申请日：2016-06-01
Inventor： Kayo HASHIZUME , Yoshio OKA , Takashi KASUGA , Jinjoo PARK , Hiroshi UEDA
IPC: H05K3/38 , B32B15/20 , B32B15/088 , H05K1/09 , H05K3/46
CPC classification number: H05K3/388 , B32B15/08 , B32B15/088 , B32B15/20 , B32B2307/202 , B32B2457/08 , H05K1/09 , H05K1/097 , H05K3/022 , H05K3/381 , H05K3/4644 , H05K2201/0338 , H05K2201/0344 , H05K2203/0766 , H05K2203/0793 , H05K2203/095
Abstract: According to an embodiment of the present invention, a substrate for a printed circuit board, the substrate including a resin film and a metal layer deposited on at least one surface of the resin film, includes a modified layer on the surface of the resin film on which the metal layer is deposited, the modified layer having a composition different from another portion, in which the modified layer contains a metal, a metal ion, or a metal compound different from a main metal of the metal layer. The content of a metal element of the metal, the metal ion, or the metal compound on a surface of the modified layer is preferably 0.2 atomic % or more and 10 atomic % or less.
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公开(公告)号：US20180054900A1
公开(公告)日：2018-02-22
申请号：US15557255
申请日：2016-03-10
Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
Inventor： Hiroshi UEDA , Kousuke MIURA , Yoshihito YAMAGUCHI , Yuka URABE
CPC classification number: H05K3/4673 , H01F17/0013 , H01F27/327 , H01F41/041 , H01F41/043 , H01F41/127 , H01F2017/0073 , H05K1/165 , H05K3/241 , H05K3/4626 , H05K3/4644 , H05K2203/1476 , H05K2203/1572
Abstract: A planar coil element of the present invention includes an insulating base film having a first surface and a second surface opposite to the first surface, a first conductive pattern deposited on the first surface side of the insulating base film, and a first insulating layer covering the first conductive pattern on the first surface side, in which the first conductive pattern includes a core body and a widening layer deposited by plating on the outer surface of the core body, and the ratio of the average thickness of the first conductive pattern to the average circuit pitch of the first conductive pattern is ½ or more and 5 or less.
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5.发明申请公开(公告)号：US20180015547A1
公开(公告)日：2018-01-18
申请号：US15546093
申请日：2016-01-26
Inventor： Issei OKADA , Yoshio OKA , Takashi KASUGA , Yasuhiro OKUDA , Jinjoo PARK , Kousuke MIURA , Hiroshi UEDA
CPC classification number: B22F9/24 , B05D3/0254 , B22F1/00 , B22F7/04 , B22F2301/10 , B22F2304/05 , C22C9/00 , H01B1/00 , H01B1/22 , H01B5/00 , H01B5/14 , H01B13/00 , H05K1/092
Abstract: An object of the present invention is to provide a metal powder and an ink with which a sintered body having good flexibility can be formed, and a sintered body having good flexibility. A metal powder according to an embodiment of the present invention has a mean particle size D50BET of 1 nm or more and 200 nm or less as calculated by a BET method, a mean crystallite size DCryst of 20 nm or less as determined by an X-ray analysis, and a ratio (DCryst/D50BET) of the mean crystallite size DCryst to the mean particle size D50BET of less than 0.4.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20170135206A1
公开(公告)日：2017-05-11
申请号：US15319997
申请日：2015-06-24
Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
Inventor： Hiroshi UEDA , Kousuke MIURA
Abstract: A printed circuit board according to an embodiment of the present invention includes a base film having an insulating property, and a conductive pattern formed on at least one of surfaces of the base film, wherein at least a portion of the conductive pattern includes a core body, and a shrink layer formed by plating on an outer surface of the core body. The portion of the conductive pattern preferably has a striped configuration or a spiral configuration. The portion of the conductive pattern preferably has an average circuit gap width of 30 μm or less. The portion of the conductive pattern preferably has an average aspect ratio of 0.5 or more. The plating is preferably electroplating or electroless plating.
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公开(公告)号：US20220418094A1
公开(公告)日：2022-12-29
申请号：US17783094
申请日：2021-05-10
Inventor： Koji NITTA , Takafumi UEMIYA , Suguru YAMAGISHI , Shigeki SHIMADA , Hiroshi UEDA , Satoshi KIYA
IPC: H05K1/02
Abstract: A high-frequency circuit includes a first dielectric layer, a circuit layer, a second dielectric layer arranged in this order, the circuit layer includes a transmission line of a high-frequency signal and a ground pattern disposed around the transmission line. An electromagnetic wave shield is disposed in the first dielectric layer and the second dielectric layer around the transmission line. The electromagnetic wave shield includes a first ground electric conductor formed on an inner surface of at least one first hole formed to extend through the first dielectric layer without extending through the ground pattern, and a second ground electric conductor formed on an inner surface of at least one second hole formed to extend through the second dielectric layer without extending through the ground pattern. The first ground electric conductor and the second ground electric conductor are each electrically connected to the ground pattern.
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公开(公告)号：US20210068255A1
公开(公告)日：2021-03-04
申请号：US16488755
申请日：2018-02-26
Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
Inventor： Tsuyoshi TAKEMOTO , Hiroshi UEDA
Abstract: A flexible printed circuit board includes: an electrically insulating substrate layer; an electrically conductive pattern stacked on at least one surface of the substrate layer; and a cover layer that is disposed on a stack including the substrate layer and the electrically conductive pattern and covers a surface of the stack, which surface is on the side on which the electrically conductive pattern is present. The electrically conductive pattern has a coil region including a coil. In the substrate layer or the cover layer, a high-magnetic permeability member is present in at least a region that overlaps the coil region in plan view.
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公开(公告)号：US20200376810A1
公开(公告)日：2020-12-03
申请号：US16636759
申请日：2018-03-20
Inventor： Kayo HASHIZUME , Yoshio OKA , Masamichi YAMAMOTO , Takashi KASUGA , Yugo KUBO , Hideki KASHIHARA , Hiroshi UEDA
Abstract: A resin film according to one aspect of the present invention is a resin film having polyimide as a main component, the resin film including a modified layer formed in a depth direction from at least one side of the resin film; and a non-modified layer other than the modified layer, wherein a ring-opening rate of an imide ring of the polyimide in the modified layer is higher than a ring-opening rate of an imide ring of the polyimide in the non-modified layer, and an average thickness of the modified layer from the one side of the resin film is greater than or equal to 10 nm and less than or equal to 500 nm.
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公开(公告)号：US20200288578A1
公开(公告)日：2020-09-10
申请号：US16648391
申请日：2018-07-09
Inventor： Kazuhiro MIYATA , Takashi KASUGA , Yoshio OKA , Hiroshi UEDA
IPC: H05K3/24 , C22C1/04 , C23C28/02 , B22F1/00 , H05K1/03 , H05K1/09 , H05K3/06 , H05K3/38 , H05K3/42
Abstract: A base material for a printed circuit board includes: an insulating base film; a sintered layer that is layered on at least one side surface of the base film and that is formed of a plurality of sintered metal particles; an electroless plating layer that is layered on a surface of the sintered layer that is opposite to the base film; and an electroplating layer that is layered on a surface of the electroless plating layer that is opposite to the sintered layer, wherein an arithmetic mean height Sa of the surface of the electroless plating layer opposite to the sintered layer is greater than or equal to 0.001 μm and less than or equal to 0.5 μm.
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