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    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20110037070A1

    公开(公告)日：2011-02-17

    申请号：US12820461

    申请日：2010-06-22

    申请人： SUNG-RYUL KIM ,  Hyeong-Suk Yoo ,  Byeong-Hoo Cho ,  O-Sung Seo ,  Seong-Hun Kim

    发明人： SUNG-RYUL KIM ,  Hyeong-Suk Yoo ,  Byeong-Hoo Cho ,  O-Sung Seo ,  Seong-Hun Kim

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L29/42384 ,  H01L29/4908

    摘要： A thin film transistor substrate includes a substrate including a display area and a peripheral area surrounding the display area, gate lines formed on the substrate including gate electrodes, an auxiliary insulating layer formed on the gate lines, a gate insulating layer formed on the auxiliary insulating layer and the gate lines, a semiconductor layer formed on the gate insulating layer, data lines formed on the semiconductor layer including source electrodes and drain electrodes, a passivation layer formed on the data lines, pixel electrodes formed on the passivation layer and electrically connected to the drain electrode, wherein the boundary line of the auxiliary insulating layer is located at or within the boundary of the gate line.

    摘要翻译： 薄膜晶体管基板包括包括显示区域和围绕显示区域的外围区域的基板，形成在包括栅电极的基板上的栅极线，形成在栅极线上的辅助绝缘层，形成在辅助绝缘层上的栅极绝缘层 形成在栅极绝缘层上的半导体层，形成在包括源电极和漏电极的半导体层上的数据线，形成在数据线上的钝化层，形成在钝化层上的电连接到 所述漏电极，其中所述辅助绝缘层的边界线位于所述栅极线的边界处或所述栅极线的边界内。

    Thin film transistor array substrate for a display panel and a method for manufacturing a thin film transistor array substrate for a display panel
    2.
    发明授权
    Thin film transistor array substrate for a display panel and a method for manufacturing a thin film transistor array substrate for a display panel 有权
    用于显示面板的薄膜晶体管阵列基板和用于制造用于显示面板的薄膜晶体管阵列基板的方法

    公开(公告)号：US08476633B2

    公开(公告)日：2013-07-02

    申请号：US12560652

    申请日：2009-09-16

    申请人： Hyeong-Suk Yoo ,  Ho-Jun Lee ,  Sung-ryul Kim ,  O-Sung Seo ,  Hong-Kee Chin

    发明人： Hyeong-Suk Yoo ,  Ho-Jun Lee ,  Sung-ryul Kim ,  O-Sung Seo ,  Hong-Kee Chin

    IPC分类号： H01L29/786

    CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248

    摘要： A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate comprising a three mask process. The 3 mask process comprising, forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming a first, second, and third passivation film successively on the substrate. Over the above multi-layers of the passivation film forming a first photoresist pattern comprising a first portion formed on part of the drain electrode and on the pixel region, and a second portion wherein, the second portion thicker than the first portion, and then patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern; and forming a transparent electrode pattern on the second passivation layer.

    摘要翻译： 公开了一种能够简化衬底结构和制造工艺的制造薄膜晶体管的方法。 制造包括三掩模工艺的薄膜晶体管阵列基板的方法。 3掩模工艺包括：在衬底上形成栅极图案，在衬底上形成栅极绝缘膜，在衬底上形成源极/漏极图案和半导体图案，在第一，第二和第三钝化膜上依次形成第一，第二和第三钝化膜 基质。 在上述多层钝化膜上形成第一光致抗蚀剂图案，该第一光致抗蚀剂图案包括形成在漏电极的一部分上和在像素区域上的第一部分，以及第二部分，其中第二部分比第一部分厚， 使用第一光致抗蚀剂图案的第三钝化膜，通过去除第一光致抗蚀剂图案的第一部分形成第二光致抗蚀剂图案，在基板上形成透明电极膜，去除第二光致抗蚀剂图案和设置在第二光致抗蚀剂上的透明电极膜 模式; 以及在所述第二钝化层上形成透明电极图案。

    Display substrate
    4.
    发明授权
    Display substrate 有权
    显示基板

    公开(公告)号：US07847291B2

    公开(公告)日：2010-12-07

    申请号：US12486328

    申请日：2009-06-17

    申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  O-Sung Seo ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Seong-Hun Kim ,  Yong-Mo Choi

    发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  O-Sung Seo ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Seong-Hun Kim ,  Yong-Mo Choi

    IPC分类号： H01L29/04

    CPC分类号： H01L27/12 ,  H01L27/1225 ,  H01L29/7869

    摘要： A display substrate includes; a substrate, a gate electrode arranged on the substrate, a semiconductor pattern arranged on the gate electrode, a source electrode arranged on the semiconductor pattern, a drain electrode arranged on the semiconductor pattern and spaced apart from the source electrode, an insulating layer arranged on, and substantially covering, the source electrode and the drain electrode to cover the source electrode and the drain electrode, a conductive layer pattern arranged on the insulating layer and overlapped aligned with the semiconductor pattern, a pixel electrode electrically connected to the drain electrode, and a storage electrode arranged on the substrate and overlapped overlapping with the pixel electrode, the storage electrode being electrically connected to the conductive layer pattern.

    摘要翻译： 显示基板包括： 衬底，布置在衬底上的栅电极，布置在栅电极上的半导体图案，布置在半导体图案上的源电极，布置在半导体图案上并与源电极间隔开的漏电极，布置在 并且基本上覆盖源电极和漏极以覆盖源电极和漏电极，布置在绝缘层上并与半导体图案重叠的导电层图案，与漏电极电连接的像素电极，以及 存储电极，设置在所述基板上，与所述像素电极重叠地重叠，所述存储电极与所述导电层图案电连接。