Abstract:
A chip on film package includes a driving integrated circuit chip; a base substrate including: a driving integrated circuit region, and a first region at which stress is converged by the base substrate bent along a side surface of the display panel; and an electrical ground pattern structure on the base substrate in the first region thereof at which the stress is converged. The electrical ground pattern structure is connected to a first side of the driving integrated circuit chip, and the ground pattern structure includes extended from the first side of the driving integrated circuit chip: in a first portion of the first region, ground patterns each inclined in a first direction, and in a second portion of the first region, ground patterns each inclined in a second direction different from the first direction.
Abstract:
A display device, including a first substrate including at least one pixel, each pixel including first, second, third, and fourth pixels; a second substrate opposing the first substrate; and first, second, and third color filters on the second substrate corresponding to the first, second, and third pixels, respectively, the first, second, and third color filters, respectively, overlapping portions of the fourth pixel, the fourth pixel being adjacent to the first, second, and third color filters.
Abstract:
A display device comprising a first substrate and a second substrate opposing one another, a thin film transistor and a color filter disposed on the first substrate, a planarization layer disposed on the thin film transistor and the color filter and a light blocking portion disposed on the planarization layer, the light blocking portion defining a pixel area, wherein the planarization layer comprises a first protrusion and a second protrusion, wherein the first protrusion is disposed in an area in which the light blocking portion is disposed, wherein the second protrusion is spaced apart from the first second protrusion, and wherein the light blocking portion comprises a first light blocking pattern disposed on the first protrusion, and the first light blocking pattern contacts the second substrate.
Abstract:
A display device including a display area and a non-display area further includes a base layer including a first surface and a second surface opposite to the first surface, the base layer having, in the non-display area, an opening portion penetrating the first surface and the second surface; a pad unit including a terminal on the first surface, the pad unit extending from the first surface to the opening portion; a connection line connected to the terminal on the first surface, the connection line extending from the non-display area to the display area; an insulating layer covering the terminal and the connection line; a thin-film transistor including a semiconductor layer on the insulating layer, the thin-film transistor being connected to the connection line; and a display element connected to the thin-film transistor, the display element being in the display area.
Abstract:
A display device including a display area and a non-display area further includes a base layer including a first surface and a second surface opposite to the first surface, the base layer having, in the non-display area, an opening portion penetrating the first surface and the second surface; a pad unit including a terminal on the first surface, the pad unit extending from the first surface to the opening portion; a connection line connected to the terminal on the first surface, the connection line extending from the non-display area to the display area; an insulating layer covering the terminal and the connection line; a thin-film transistor including a semiconductor layer on the insulating layer, the thin-film transistor being connected to the connection line; and a display element connected to the thin-film transistor, the display element being in the display area.
Abstract:
A liquid crystal display device includes: a liquid crystal layer between first and second display panels. Then first display panel includes:gate and data lines on a first substrate; a thin film transistor connected to the gate and data lines and exposed at a single contact hole; a color filter on the thin film transistor; a first insulation layer covering the color filter and in which is defined a first contact hole exposing the thin film transistor at the single contact hole; common and pixel electrodes on the first insulation layer and overlapping each other; and a second insulation layer between the pixel and common electrodes and in which is defined a second contact hole exposing the thin film transistor at the single contact hole. Shapes of the first and second contact holes correspond to each other to define the single contact hole at which the thin film transistor is exposed.