-
1.
公开(公告)号:US20190139899A1
公开(公告)日:2019-05-09
申请号:US16240174
申请日:2019-01-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yoonha JUNG , Jongkook KIM , Bona BAEK , Heeseok LEE , Kyoungsei CHOI
IPC: H01L23/538 , H01L23/498 , H01L25/10 , H01L23/552 , H01L23/31 , H01L23/00
Abstract: A semiconductor package includes a first plate having a through hole therein, at least one interconnection layer disposed on a first surface of the first plate, and at least one semiconductor chip disposed on the at least one interconnection layer in a space defined by the through hole and electrically connected to the least one interconnection layer. The package further includes a second plate disposed on the at least one semiconductor chip and a second surface of the first plate on a side of the first plate opposite the first surface, and at least one conductive pad disposed on the second surface of the first plate and electrically connected to the at least one interconnection layer.
-
公开(公告)号:US20240379545A1
公开(公告)日:2024-11-14
申请号:US18427135
申请日:2024-01-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeong Wan HAN , Bona BAEK , Byungkeun KIM , Young-Hoo KIM , Jeonghun KIM
IPC: H01L23/528 , H01L23/532
Abstract: A semiconductor device comprising: a substrate; and a conductive structure on the substrate, wherein the conductive structure comprises: a lower conductive structure comprising a lower conductive pattern; and an upper conductive structure comprising an upper conductive pattern, wherein the upper conductive structure is on the lower conductive structure, wherein at least one of a first side surface of the lower conductive pattern or a second side surface of the upper conductive pattern comprises a rough surface, and wherein a first width of a lower surface of the upper conductive pattern in a first direction parallel to a lower surface of the substrate is substantially equal to or less than a second width of an upper surface of the lower conductive pattern in the first direction.
-
3.
公开(公告)号:US20160329285A1
公开(公告)日:2016-11-10
申请号:US15215227
申请日:2016-07-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yoonha JUNG , Jongkook KIM , Bona BAEK , Heeseok LEE , Kyoungsei CHOI
IPC: H01L23/538 , H01L23/00 , H01L25/10 , H01L23/31 , H01L23/552
CPC classification number: H01L23/5389 , H01L23/3114 , H01L23/49816 , H01L23/49822 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L25/105 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/3224 , H01L2224/32245 , H01L2224/33181 , H01L2224/48091 , H01L2224/48105 , H01L2224/48227 , H01L2224/49113 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2224/83101 , H01L2224/83424 , H01L2224/83444 , H01L2224/83447 , H01L2224/83455 , H01L2224/83471 , H01L2224/8385 , H01L2225/0651 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/181 , H01L2924/014 , H01L2924/0665 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package includes a first plate having a through hole therein, at least one interconnection layer disposed on a first surface of the first plate, and at least one semiconductor chip disposed on the at least one interconnection layer in a space defined by the through hole and electrically connected to the least one interconnection layer. The package further includes a second plate disposed on the at least one semiconductor chip and a second surface of the first plate on a side of the first plate opposite the first surface, and at least one conductive pad disposed on the second surface of the first plate and electrically connected to the at least one interconnection layer.
-
-