公开(公告)号：US20210320123A1

公开(公告)日：2021-10-14

申请号：US17036594

申请日：2020-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANGSOO LEE ,  CHAEHO KIM ,  WOOSUNG LEE ,  PHIL OUK NAM ,  JUNGGEUN JEE

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11565 ,  H01L27/11573 ,  H01L23/535

Abstract: Disclosed is a three-dimensional semiconductor memory device including a carbon-containing layer on a substrate, a plurality of electrode interlayer dielectric layers and a plurality of electrode layers that are alternately stacked on the carbon-containing layer, a cell vertical pattern that penetrates at least some of the electrode interlayer dielectric layers and the electrode layers, and a semiconductor pattern between the cell vertical pattern and the carbon-containing layer. The substrate includes a plurality of first grains. The semiconductor pattern includes a plurality of second grains. An average size of the second grains is less than an average size of the first grains.

公开(公告)号：US20170037537A1

公开(公告)日：2017-02-09

申请号：US15204994

申请日：2016-07-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min RYU ,  Sang Min LEE ,  HEE JONG JEONG ,  CHAEHO KIM ,  Ji Su SON ,  JAEBONG LEE ,  JUWAN LIM ,  JUNGWOO CHOI

IPC: C30B25/16 ,  C30B25/12 ,  C30B25/10 ,  C30B25/14 ,  C23C16/455 ,  C30B29/10 ,  C23C16/458 ,  C23C16/50 ,  C23C16/44 ,  C30B25/08 ,  C30B29/06

CPC classification number: C30B25/16 ,  C23C16/4584 ,  C23C16/4585 ,  C23C16/481 ,  C23C16/52 ,  C30B25/105

Abstract: An apparatus is provided for depositing a thin film. The apparatus includes a chamber, a susceptor disposed in the chamber and supporting a substrate, a reflection housing disposed outside the chamber, a light source unit disposed in the reflection housing and irradiating light to the susceptor, and a light controlling unit blocking at least a portion of an irradiation path of the light to control an irradiation area of the light on the susceptor. At least a portion of the light controlling unit is disposed in the reflection housing.

Abstract translation: 提供了一种用于沉积薄膜的装置。 该装置包括：室，设置在室中的基座和支撑基板;设置在室外的反射壳体;设置在反射壳体中并将光照射到基座的光源单元;以及光控制单元， 光的照射路径的一部分，以控制基座上的光的照射面积。 光控制单元的至少一部分设置在反射壳体中。

公开(公告)号：US20150357346A1

公开(公告)日：2015-12-10

申请号：US14831449

申请日：2015-08-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： BYONG-HYUN JANG ,  JUHYUNG KIM ,  WOON KYUNG LEE ,  JAEGOO LEE ,  CHAEHO KIM ,  JUNKYU YANG ,  PHIL OUK NAM ,  JAEYOUNG AHN ,  KlHYUN HWANG

IPC: H01L27/115 ,  H01L29/51 ,  H01L29/10 ,  H01L23/528 ,  H01L29/423 ,  H01L29/04

CPC classification number: H01L29/792 ,  H01L23/528 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/045 ,  H01L29/1037 ,  H01L29/42364 ,  H01L29/511 ,  H01L29/66833 ,  H01L29/7926 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor memory device and a method of fabricating the same. The device includes a plurality of gates vertically stacked on a top surface of a substrate with an epitaxial layer formed in the substrate, a vertical channel vertically penetrating the gates to be electrically connected to the epitaxial layer, and a memory layer provided between the vertical channel and the gates. The epitaxial layer has a top surface positioned at a level between a bottom surface of the lowermost one of the gates and the top surface of the substrate.

Abstract translation: 一种半导体存储器件及其制造方法。 该器件包括垂直堆叠在衬底的顶表面上的多个栅极，该衬底的顶表面上形成有在该衬底中形成的外延层，垂直穿过该栅极的垂直沟道以与该外延层电连接;以及存储层，设置在该垂直沟道 和大门。 外延层具有位于最下面一个栅极的底表面和基板的顶表面之间的高度的顶表面。