Electronic device comprising antenna

    公开(公告)号:US11056768B2

    公开(公告)日:2021-07-06

    申请号:US16060300

    申请日:2016-11-14

    摘要: According to various examples, an electronic device comprising: a housing, which is a foldable housing and includes a first housing part including a first surface and a second surface oppositely facing the first surface, a second housing part including a first surface facing the first surface of the first housing part when folded in a first direction, and a second surface facing the second surface of the first housing part when folded in a second direction, and a connection part connecting the first housing part and the second housing part; a communication circuit disposed inside the housing; a first antenna pattern disposed inside the first housing part; a second antenna pattern disposed inside the second housing part; a first display exposed to the first surface of the first housing part; a second display exposed to the first surface of the second housing part; a first conductive member exposed to the second surface of the first housing part, and electrically connected to the first antenna pattern; and a second conductive member exposed to the second surface of the second housing part, and electrically connected to the second antenna pattern, wherein the communication circuit is electrically connected to the first antenna pattern and/or the second antenna pattern, and the first conductive member and the second conductive member can be electrically connected or coupled with each other, when the housing is folded in the second direction.

    METHOD OF DRIVING LIGHT EMITTING DIODE BACKLIGHT UNIT AND DISPLAY DEVICE PERFORMING THE SAME

    公开(公告)号:US20230230551A1

    公开(公告)日:2023-07-20

    申请号:US18068861

    申请日:2022-12-20

    IPC分类号: G09G3/34

    CPC分类号: G09G3/3406 G09G3/32

    摘要: A method of driving a light emitting diode (LED) backlight unit, which includes a plurality of LED elements that are connected to a plurality of gate lines and a plurality of source lines, includes generating a plurality of gate signals applied to the plurality of gate lines. While the plurality of gate signals are generated, a non-overlap interval between activation intervals of two adjacent gate signals is generated. All of the plurality of gate signals are deactivated during the non-overlap interval. A plurality of source signals applied to the plurality of source lines are generated. While the plurality of source signals are generated, a high-impedance (Hi-Z) interval included in the non-overlap interval is generated. At least some of the plurality of source signals have a high-impedance state during the high-impedance interval.

    Electronic device and method for displaying and transmitting images thereof

    公开(公告)号:US11561754B2

    公开(公告)日:2023-01-24

    申请号:US17139373

    申请日:2020-12-31

    摘要: A method for displaying and transmitting images and an electronic device thereof are provided. The electronic device includes a first display, a second display separated from the first display, a transceiver, at least one processor electrically connected to the first display, the second display, and the transceiver, and a memory electrically connected to the at least one processor. The at least one processor is configured to display a first screen image on the first display, provide a second screen image on the second display at least partially simultaneously with the displaying of the first screen image on the first display, provide data associated with one of the screen images to the transceiver, and control the transceiver to transmit the data to an external device such that a screen image at least partially identical to one of the screen images is output on a display of the external device.

    Memory device for processing a row-hammer refresh operation and a method of operating thereof

    公开(公告)号:US11532336B2

    公开(公告)日:2022-12-20

    申请号:US17340423

    申请日:2021-06-07

    摘要: A memory device including: a memory cell array including a plurality of memory cell rows; an address buffer configured to store addresses of target rows of the plurality of memory cell rows, wherein the addresses of the target rows have been repeatedly accessed; a minimum access output circuit configured to select, when there are a plurality of rows having a same minimum access count among the target rows, any one of the plurality of rows having the same minimum access count as a minimum access row based on a selection command value, and to output an index value of the minimum access row; and a control circuit configured to output a command instructing replacement of an address corresponding to the index value of the minimum access row with an address of an access row and storage of the address of the access row in the address buffer.