INTEGRATED CIRCUIT INCLUDING MULTI-HEIGHT CELLS AND METHOD OF DESIGNING THE SAME

    公开(公告)号:US20230378156A1

    公开(公告)日:2023-11-23

    申请号:US18303607

    申请日:2023-04-20

    IPC分类号: H01L27/02 G06F30/31

    CPC分类号: H01L27/0207 G06F30/31

    摘要: An integrated circuit includes a first cell and a second cell respectively arranged in a first row and a second row that are adjacent to each other and extend in a first direction, and a third cell continuously arranged in the first row and the second row, wherein each of the first cell and the second cell comprises a first active pattern group including at least one active pattern that extends in the first direction and has a first conductivity type, the third cell comprises a second active pattern group including at least one active pattern that extends in the first direction in the first row and has the first conductivity type, and an effective channel width of the second active pattern group is greater than an effective channel width of the first active pattern group.

    INTEGRATED CIRCUIT INCLUDING STANDARD CELLS, AND METHOD OF DESIGNING THE INTEGRATED CIRCUIT

    公开(公告)号:US20220262786A1

    公开(公告)日:2022-08-18

    申请号:US17670626

    申请日:2022-02-14

    IPC分类号: H01L27/02 H01L27/118

    摘要: An integrated circuit including a first standard cell placed continuously on a row having a first height and a row having a second height different from the first height. The integrated circuit also includes a second standard cell continuously placed on a row having the first height and a row having the second height, a plurality of first power lines formed on boundaries of the plurality of rows and configured to supply a first supply voltage to the standard cells, and a plurality of second power lines formed on boundaries of the plurality of rows and configured to supply a second supply voltage to the standard cells. A placement sequence of the power lines supplying a voltage to the first standard cell being different from a placement sequence of the power lines supplying a voltage to the second standard cell.

    INTEGRATED CIRCUITS INCLUDING ABUTTED BLOCKS AND METHODS OF DESIGNING LAYOUTS OF THE INTEGRATED CIRCUITS

    公开(公告)号:US20230297752A1

    公开(公告)日:2023-09-21

    申请号:US18162120

    申请日:2023-01-31

    IPC分类号: G06F30/392

    CPC分类号: G06F30/392

    摘要: Integrated circuits including abutted blocks and methods of designing layouts of the integrated circuits are disclosed. The integrated circuit includes a first block having a first function cell array therein, which is at least partially surrounded by a first plurality of finishing cells, and a second block extending adjacent the first block. The second block includes a second function cell array therein, which is at least partially surrounded by a second plurality of finishing cells. The first plurality of finishing cells include: (i) a first finishing cell placed at a boundary of the integrated circuit, and (ii) a second finishing cell different from the first finishing cell, which is placed at a boundary between the first block and the second block.