-
1.发明申请Integrated Circuit Devices Including Interconnections Insulated by Air Gaps and Methods of Fabricating the Same 审中-公开包括由空气间隙绝缘的互连的集成电路器件及其制造方法公开(公告)号：US20140342548A1
公开(公告)日：2014-11-20
申请号：US14451650
申请日：2014-08-05
发明人： Jeeyong Kim , Hyunchul Back , Jung-Hwan Lee , Hyunmin Lee
IPC分类号： H01L21/768
CPC分类号： H01L21/7682 , H01L21/76877 , H01L23/481 , H01L23/522 , H01L23/5222 , H01L27/11524 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of fabricating the same are provided. The semiconductor device may include interconnections extending in a first direction on a substrate and spaced apart from each other in a second direction perpendicular to the first direction, barrier dielectric patterns disposed on top surfaces of the interconnections, respectively, and an upper interlayer dielectric layer disposed on the interconnection. Respective air gaps are disposed between adjacent ones of the interconnections.
摘要翻译： 提供半导体器件及其制造方法。 半导体器件可以包括在衬底上沿着第一方向延伸并且在垂直于第一方向的第二方向彼此间隔开的互连，分别设置在互连的顶表面上的势垒电介质图案和布置在 在互连上。 相应的气隙设置在相邻的互连之间。
-
2.发明授权公开(公告)号：US09165820B2
公开(公告)日：2015-10-20
申请号：US14451650
申请日：2014-08-05
发明人： Jeeyong Kim , Hyunchul Back , Jung-Hwan Lee , Hyunmin Lee
IPC分类号： H01L21/768 , H01L23/48 , H01L23/522
CPC分类号： H01L21/7682 , H01L21/76877 , H01L23/481 , H01L23/522 , H01L23/5222 , H01L27/11524 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of fabricating the same are provided. The semiconductor device may include interconnections extending in a first direction on a substrate and spaced apart from each other in a second direction perpendicular to the first direction, barrier dielectric patterns disposed on top surfaces of the interconnections, respectively, and an upper interlayer dielectric layer disposed on the interconnection. Respective air gaps are disposed between adjacent ones of the interconnections.
摘要翻译： 提供半导体器件及其制造方法。 半导体器件可以包括在衬底上沿着第一方向延伸并且在垂直于第一方向的第二方向彼此间隔开的互连，分别设置在互连的顶表面上的势垒电介质图案和布置在 在互连上。 相应的气隙设置在相邻的互连之间。
-
3.发明申请INTEGRATED CIRCUIT DEVICES INCLUDING INTERCONNECTIONS INSULATED BY AIR GAPS AND METHODS OF FABRICATING THE SAME 有权集成电路设备，包括由空气保险丝绝缘的互连及其制造方法公开(公告)号：US20130228934A1
公开(公告)日：2013-09-05
申请号：US13779174
申请日：2013-02-27
发明人： Jeeyong KIM , Hyunchul Back , Jung-Hwan Lee , Hyunmin Lee
IPC分类号： H01L23/48
CPC分类号： H01L21/7682 , H01L21/76877 , H01L23/481 , H01L23/522 , H01L23/5222 , H01L27/11524 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of fabricating the same are provided. The semiconductor device may include interconnections extending in a first direction on a substrate and spaced apart from each other in a second direction perpendicular to the first direction, barrier dielectric patterns disposed on top surfaces of the interconnections, respectively, and an upper interlayer dielectric layer disposed on the interconnection. Respective air gaps are disposed between adjacent ones of the interconnections.
摘要翻译： 提供半导体器件及其制造方法。 半导体器件可以包括在衬底上沿着第一方向延伸并且在垂直于第一方向的第二方向彼此间隔开的互连，分别设置在互连的顶表面上的势垒电介质图案和布置在 在互连上。 相应的气隙设置在相邻的互连之间。
-
公开(公告)号：US09553101B2
公开(公告)日：2017-01-24
申请号：US14258772
申请日：2014-04-22
发明人： Taekyung Kim , Kwang Soo Seol , Hyunchul Back , Jin-Soo Lim , Seong Soon Cho
IPC分类号： H01L27/115 , H01L27/06 , H01L27/24 , H01L29/66 , H01L29/788 , H01L29/792 , H01L45/00
CPC分类号： H01L27/11578 , H01L27/0688 , H01L27/11519 , H01L27/11556 , H01L27/11582 , H01L27/11597 , H01L27/2409 , H01L27/2454 , H01L27/249 , H01L29/66825 , H01L29/66833 , H01L29/7889 , H01L29/7926 , H01L45/04 , H01L45/06 , H01L45/10 , H01L45/1226 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要： A semiconductor device may include gate structures spaced apart above a top surface of a substrate. The gate structures may include a horizontal electrode extending in a first direction parallel with the top surface of a substrate. An isolation insulating layer may be disposed between the gate structures. A plurality of cell pillars may penetrate the horizontal electrode and connect to the substrate. The plurality of cell pillars may include a minimum spacing defined by a shortest distance between any two of the plurality of cell pillars. The thickness of the horizontal electrode may be greater than the minimum spacing of the cell pillars.
摘要翻译： 半导体器件可以包括在衬底的顶表面之上间隔开的栅极结构。 栅极结构可以包括在与衬底的顶表面平行的第一方向上延伸的水平电极。 隔离绝缘层可以设置在栅极结构之间。 多个单元柱可以穿透水平电极并连接到基板。 多个单元柱可以包括由多个单元柱中的任何两个之间的最短距离限定的最小间隔。 水平电极的厚度可以大于电池柱的最小间距。
-
公开(公告)号：US20140322911A1
公开(公告)日：2014-10-30
申请号：US14328496
申请日：2014-07-10
发明人： YOUNG-HO LEE , Keonsoo Kim , Hyunchul Back , Jinhyun Shin , Seungwook Choi
IPC分类号： H01L21/768
CPC分类号： H01L21/76879 , H01L21/76816 , H01L21/7682 , H01L21/76834 , H01L21/76885 , H01L21/76897
摘要： A method of forming a semiconductor device may include forming a contact mold layer on a substrate; forming an interconnection mold layer on the contact mold layer that includes a material having an etching selectivity with respect to the contact mold layer; forming grooves in the interconnection mold layer that extend in a first direction and expose the contact mold layer; forming holes in the contact mold layer connected to the grooves by etching a part of the contact mold layer exposed by the groove; and forming contact portions in the holes and interconnections in the groove. A diffusion coefficient of mobile atoms in the contact mold layer is greater than a diffusion coefficient of mobile atoms in a nitride.
摘要翻译： 形成半导体器件的方法可以包括在基片上形成接触模层; 在所述接触模层上形成互连模层，所述互连模层包括相对于所述接触模层具有蚀刻选择性的材料; 在所述互连模制层中形成沿第一方向延伸并暴露所述接触模制层的凹槽; 通过蚀刻由凹槽露出的接触模具层的一部分，在连接到凹槽的接触模层中形成孔; 并且在孔中形成接触部分和凹槽中的互连。 接触模具层中的移动原子的扩散系数大于氮化物中的移动原子的扩散系数。
-
6.发明授权公开(公告)号：US08829682B2
公开(公告)日：2014-09-09
申请号：US13779174
申请日：2013-02-27
发明人： Jeeyong Kim , Hyunchul Back , Jung-Hwan Lee , Hyunmin Lee
IPC分类号： H01L23/48
CPC分类号： H01L21/7682 , H01L21/76877 , H01L23/481 , H01L23/522 , H01L23/5222 , H01L27/11524 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of fabricating the same are provided. The semiconductor device may include interconnections extending in a first direction on a substrate and spaced apart from each other in a second direction perpendicular to the first direction, barrier dielectric patterns disposed on top surfaces of the interconnections, respectively, and an upper interlayer dielectric layer disposed on the interconnection. Respective air gaps are disposed between adjacent ones of the interconnections.
摘要翻译： 提供半导体器件及其制造方法。 半导体器件可以包括在衬底上沿着第一方向延伸并且在垂直于第一方向的第二方向彼此间隔开的互连，分别设置在互连的顶表面上的势垒电介质图案和布置在 在互连上。 相应的气隙设置在相邻的互连之间。
-
-
-
-
-
搜索结果
6 条记录 (耗时 0.015 秒)
