公开(公告)号：US20220037586A1

公开(公告)日：2022-02-03

申请号：US17212790

申请日：2021-03-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junho Jeong ,  Joonmyoung Lee ,  Whankyun Kim ,  Eunsun Noh ,  Jeongheon Park ,  Wanjin Chung

IPC: H01L43/02 ,  H01F10/32 ,  H01L43/10 ,  G11C11/16 ,  H01L27/22

Abstract: Provided is a magnetic memory device. The magnetic memory device may include a magnetic tunnel junction. The magnetic tunnel junction may include a fixed layer, a tunnel barrier layer on the fixed layer, a free layer on the tunnel barrier layer, a protection layer above the free layer, the protection layer comprising an amorphous metal boride, and a capping layer on the protection layer, the capping layer comprising a metal or a metal nitride.

公开(公告)号：US12286707B2

公开(公告)日：2025-04-29

申请号：US17487088

申请日：2021-09-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joonmyoung Lee ,  Whankyun Kim ,  Jeongheon Park ,  Junho Jeong

IPC: C23C14/56 ,  C23C14/08 ,  C23C16/40 ,  C23C16/54 ,  H01L21/67 ,  H10N50/01

Abstract: An apparatus for manufacturing a semiconductor device includes first and second process chambers in a first row in a first direction, third and fourth process chambers in a second row in the first direction, the third and fourth process chambers being spaced apart from the first and second process chambers in a second direction, and the first and third process chambers being arranged in parallel in the second direction to perform a same process, a load-lock chamber at one side of the first to fourth process chambers in the first direction, and first and second transfer chambers directly connected to each other in a third row in the first direction, the third row being between the first and second rows, and each of the first and second transfer chambers including a transfer unit to transfer a semiconductor substrate between the first to fourth process chambers and the load-lock chamber.

公开(公告)号：US20230371392A1

公开(公告)日：2023-11-16

申请号：US18118571

申请日：2023-03-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoonyoung LEE ,  Sanghwan Park ,  Yongsung Park ,  Jeongheon Park ,  Hyeonwoo Seo

IPC: H10N50/10 ,  H10B61/00 ,  H10N50/85 ,  H01L23/528 ,  H10B80/00 ,  H01L25/16

CPC classification number: H10N50/10 ,  H10B61/22 ,  H10N50/85 ,  H01L23/5283 ,  H10B80/00 ,  H01L25/16

Abstract: A magnetoresistive memory device includes: a lower electrode; a lower magnetic material layer on the lower electrode; a tunnel barrier layer on the lower magnetic material layer; an upper magnetic material layer on the tunnel barrier layer; a cap structure, on the upper magnetic material layer, including first layers and second layers, alternately layered; a cap conductive layer on the cap structure; and an upper electrode on the cap conductive layer, wherein the first layers include a first material including a non-magnetic material, and the second layers include a second material including a magnetic material.

公开(公告)号：US20230074141A1

公开(公告)日：2023-03-09

申请号：US17720591

申请日：2022-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghwan Park ,  Younghyun Kim ,  Jaehoon Kim ,  Jeongheon Park ,  Sechung Oh

IPC: H01L43/02 ,  H01F10/32 ,  H01L27/22 ,  H01L43/10 ,  H01L43/12

Abstract: A magnetic device includes a seed pattern, a reference magnetic structure on the seed pattern, a free magnetic pattern on the reference magnetic structure, and a tunnel barrier between the reference magnetic structure and the free magnetic pattern. The reference magnetic structure includes a synthetic antiferromagnetic (SAF) structure including a first fixed pattern in contact with an upper surface of the seed pattern, an antiferromagnetic coupling pattern in contact with an upper surface of the first fixed pattern, and a second fixed pattern in contact with an upper surface of the antiferromagnetic coupling pattern; a nonmagnetic pattern in contact with an upper surface of the second fixed pattern; and a polarization reinforcement magnetic pattern in contact with an upper surface of the nonmagnetic pattern.