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公开(公告)号:US11551729B2
公开(公告)日:2023-01-10
申请号:US17215914
申请日:2021-03-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangyun Kim , Kyungryun Kim , Junghwan Park , Yeonkyu Choi
Abstract: A memory device includes: a first circuit; a second circuit; and an adaptive body bias generator configured to receive frequency detection information or temperature detection information, to apply a first forward body bias or a first reverse body bias to the first circuit in response to the frequency detection information or the temperature detection information, and to apply a second forward body bias or a second reverse body bias to the second circuit in response to the frequency detection information or the temperature detection information.
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公开(公告)号:US20220130581A1
公开(公告)日:2022-04-28
申请号:US17350157
申请日:2021-06-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghyun Kim , Sechung Oh , Naoki Hase , Heeju Shin , Junghwan Park
Abstract: A magnetic device includes a fixed layer including a fixed pattern, a free layer, and a tunnel barrier between the fixed layer and the free layer. The fixed pattern includes a first magnetic pattern, a second magnetic pattern, and a hybrid spacer, including a nonmagnetic material layer, between the first magnetic pattern and the second magnetic pattern, the nonmagnetic material including a plurality of magnetic nanoparticles dispersed therein.
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公开(公告)号:US09893271B2
公开(公告)日:2018-02-13
申请号:US15210151
申请日:2016-07-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junghwan Park , Jonguk Kim , Soonoh Park , Jung Moo Lee , Sugwoo Jung
CPC classification number: H01L43/02 , H01L27/228 , H01L43/08 , H01L43/12
Abstract: A semiconductor memory device includes a selection transistor on a semiconductor substrate, a lower contact plug connected to a drain region of the selection transistor, and a magnetic tunnel junction pattern on the lower contact plug, the magnetic tunnel junction pattern including a bottom electrode in contact with the lower contact plug, the bottom electrode being an amorphous tantalum nitride layer, a top electrode on the bottom electrode, first and second magnetic layers between the top and bottom electrodes, and a tunnel barrier layer between the first and second magnetic layers.
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4.
公开(公告)号:US12190928B2
公开(公告)日:2025-01-07
申请号:US17970788
申请日:2022-10-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Younghyun Kim , Sechung Oh , Heeju Shin , Jaehoon Kim , Sanghwan Park , Junghwan Park
Abstract: A magnetoresistive random access memory device includes a pinned layer; a tunnel barrier layer on the pinned layer; a free layer structure on the tunnel barrier layer, the free layer structure including a plurality of magnetic layers and a plurality of metal insertion layers between the magnetic layers; and an upper oxide layer on the free layer structure, wherein each of the metal insertion layers includes a non-magnetic metal material doped with a magnetic material, and the metal insertion layers are spaced apart from each other.
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5.
公开(公告)号:US12185543B2
公开(公告)日:2024-12-31
申请号:US17742043
申请日:2022-05-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sanghun Chun , Kwangyoung Jung , Youngji Noh , Junghwan Park , Jeehoon Han
Abstract: A semiconductor device includes a substrate, gate electrodes stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, channel structures penetrating the gate electrodes, extending in the first direction, and each including a channel layer, separation regions penetrating the gate electrodes, extending in the first direction and a second direction perpendicular to the first direction, and spaced apart from each other in a third direction perpendicular to the first direction and the second direction, and crack prevention layers disposed on at least a portion of the separation regions, wherein each of the separation regions includes a lower region and upper regions spaced apart from each other in the second direction on the lower region and protruding upwardly from the lower region, and wherein the crack prevention layers are in contact with upper surfaces of the upper regions.
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公开(公告)号:US09860741B2
公开(公告)日:2018-01-02
申请号:US14972509
申请日:2015-12-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jongheon Kim , Cheehwan Yang , Jangsun Yoo , Junghwan Park
CPC classification number: H04W8/22
Abstract: An electronic device and method are disclosed. The electronic device includes a wireless communication unit that performs wireless communication, a display unit, and at least one processor, which implements the method, including in response to detecting a request to enter a wireless communication maximization mode, controlling the display unit to display an option for configuring the wireless communication maximization mode, detecting a selection input to the option, and changing a configuration of at least one component of the electronic device to reduce noise from the at least one component generated in a wireless communication frequency band according to the selected option.
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公开(公告)号:US12262641B2
公开(公告)日:2025-03-25
申请号:US17466246
申请日:2021-09-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyungil Hong , Jungmin Lee , Younghyun Kim , Junghwan Park , Heeju Shin , Se Chung Oh
Abstract: A method of fabricating a magnetic memory device comprises forming, on a substrate, a data storage structure including a bottom electrode, a magnetic tunnel junction pattern, and a top electrode, forming a first capping dielectric layer conformally covering lateral and top surfaces of the data storage structure, and forming a second capping dielectric layer on the first capping dielectric layer. The forming the first capping dielectric layer is performed by PECVD in which a first source gas, a first reaction gas, and a first purging gas are supplied. The forming the second capping dielectric layer Is performed by PECVD in which a second source gas, a second reaction gas, and a second purging gas are supplied. The first and second reaction gases are different from each other. The first and second purging gases are different from each other.
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公开(公告)号:US11495736B2
公开(公告)日:2022-11-08
申请号:US16793336
申请日:2020-02-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyungil Hong , Younghyun Kim , Junghwan Park , Sechung Oh , Jungmin Lee
Abstract: A semiconductor device includes a plurality of magnetic tunnel junction (MTJ) structures in an interlayer insulating layer on a substrate. A blocking layer is on the interlayer insulating layer and the plurality of MTJ structures. An upper insulating layer is on the blocking layer. An upper interconnection is on the upper insulating layer. An upper plug is connected to the upper interconnection and a corresponding one of the plurality of MTJ structures and extends into the upper insulating layer and the blocking layer. The blocking layer includes a material having a higher absorbance constant than the upper insulating layer.
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公开(公告)号:US11329219B2
公开(公告)日:2022-05-10
申请号:US16840741
申请日:2020-04-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jungmin Lee , Younghyun Kim , Junghwan Park , Sechung Oh , Kyungil Hong
Abstract: In a method of manufacturing a magnetoresistive random access memory, a memory structure may be formed on a substrate. The memory structure may include a lower electrode, a magnetic tunnel junction (MTJ) structure, and an upper electrode sequentially stacked. A protection layer including silicon nitride may be formed to cover a surface of the memory structure. The protection layer may be formed by a chemical vapor deposition process using plasma and introducing deposition gases including a silicon source gas, a nitrogen source gas containing no hydrogen and a dissociation gas. Damages of the MTJ structure may be decreased during forming the protection layer. Thus, the MRAM may have improved characteristics.
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公开(公告)号:US11935677B2
公开(公告)日:2024-03-19
申请号:US17350157
申请日:2021-06-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghyun Kim , Sechung Oh , Naoki Hase , Heeju Shin , Junghwan Park
CPC classification number: H01F10/3254 , H01F1/0063 , H01F10/3272 , H01F10/329 , H10B61/22 , H10N50/10 , H10N50/80 , G11C11/161 , H10N50/85
Abstract: A magnetic device includes a fixed layer including a fixed pattern, a free layer, and a tunnel barrier between the fixed layer and the free layer. The fixed pattern includes a first magnetic pattern, a second magnetic pattern, and a hybrid spacer, including a nonmagnetic material layer, between the first magnetic pattern and the second magnetic pattern, the nonmagnetic material including a plurality of magnetic nanoparticles dispersed therein.
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