公开(公告)号：US20190122745A1

公开(公告)日：2019-04-25

申请号：US15995461

申请日：2018-06-01

申请人： Samsung Electronics Co., Ltd.

发明人： Jongmin KIM ,  Yeongjin Seo ,  Keun-Hwan Lee

IPC分类号： G11C29/50 ,  G06F12/00

CPC分类号： G11C29/50012 ,  G06F12/00 ,  G11C29/023 ,  G11C29/028 ,  G11C29/1201 ,  G11C29/12015 ,  G11C2029/4402

摘要： A storage device includes a plurality of nonvolatile memory devices; and a controller connected in common to the plurality of nonvolatile memory devices through data lines, the controller being configured to detect first offset information by performing a first training operation with respect to a first nonvolatile memory device from among the plurality of nonvolatile memory devices, the controller being further configured to, based on the first offset information, perform a second training operation with respect to a second nonvolatile memory device from among the plurality of nonvolatile memory devices.

公开(公告)号：US11238954B2

公开(公告)日：2022-02-01

申请号：US16998068

申请日：2020-08-20

申请人： Samsung Electronics Co., Ltd.

发明人： Jongmin Kim ,  Yeongjin Seo ,  Keun-Hwan Lee

IPC分类号： G11C29/50 ,  G11C29/12 ,  G11C29/02 ,  G06F12/00 ,  G11C29/44

摘要： A storage device includes a plurality of nonvolatile memory devices; and a controller connected in common to the plurality of nonvolatile memory devices through data lines, the controller being configured to detect first offset information by performing a first training operation with respect to a first nonvolatile memory device from among the plurality of nonvolatile memory devices, the controller being further configured to, based on the first offset information, perform a second training operation with respect to a second nonvolatile memory device from among the plurality of nonvolatile memory devices.

公开(公告)号：US20190079882A1

公开(公告)日：2019-03-14

申请号：US15964993

申请日：2018-04-27

申请人： Samsung Electronics Co., Ltd.

发明人： YoungWook KIM ,  Hyung-jin Kim ,  Soong-Man Shin ,  Keun-Hwan Lee

IPC分类号： G06F13/16 ,  G11C7/10 ,  G11C7/22 ,  G06F3/06

CPC分类号： G06F13/1689 ,  G06F3/0614 ,  G06F3/0658 ,  G06F3/0673 ,  G11C7/1009 ,  G11C7/1093 ,  G11C7/22 ,  G11C16/06 ,  G11C16/32 ,  G11C29/52 ,  G11C2207/2254

摘要： An operation method performed at a nonvolatile memory device may include receiving a program command and an address from an external device through a data signal (DQ), receiving a specific pattern from the external device through the data signal and a data strobe signal (DQS) synchronized with the data signal in a pattern period, receiving user data from the external device through the data signal and the data strobe signal in a data period, and selectively performing a program operation on the user data or a recovery operation based on a determination of whether the specific pattern matches with a particular pattern. A rising edge or a falling edge of the data strobe signal may be aligned with a left edge or a right edge of a window of the data signal in the pattern period.

公开(公告)号：US10755797B2

公开(公告)日：2020-08-25

申请号：US15995461

申请日：2018-06-01

申请人： Samsung Electronics Co., Ltd.

发明人： Jongmin Kim ,  Yeongjin Seo ,  Keun-Hwan Lee

IPC分类号： G11C29/50 ,  G11C29/12 ,  G11C29/02 ,  G06F12/00 ,  G11C29/44

摘要： A storage device includes a plurality of nonvolatile memory devices; and a controller connected in common to the plurality of nonvolatile memory devices through data lines, the controller being configured to detect first offset information by performing a first training operation with respect to a first nonvolatile memory device from among the plurality of nonvolatile memory devices, the controller being further configured to, based on the first offset information, perform a second training operation with respect to a second nonvolatile memory device from among the plurality of nonvolatile memory devices.

公开(公告)号：US10366023B2

公开(公告)日：2019-07-30

申请号：US15964993

申请日：2018-04-27

申请人： Samsung Electronics Co., Ltd.

发明人： YoungWook Kim ,  Hyung-jin Kim ,  Soong-Man Shin ,  Keun-Hwan Lee

IPC分类号： G11C7/00 ,  G06F13/16 ,  G11C7/10 ,  G11C7/22 ,  G06F3/06

摘要： An operation method performed at a nonvolatile memory device may include receiving a program command and an address from an external device through a data signal (DQ), receiving a specific pattern from the external device through the data signal and a data strobe signal (DQS) synchronized with the data signal in a pattern period, receiving user data from the external device through the data signal and the data strobe signal in a data period, and selectively performing a program operation on the user data or a recovery operation based on a determination of whether the specific pattern matches with a particular pattern. A rising edge or a falling edge of the data strobe signal may be aligned with a left edge or a right edge of a window of the data signal in the pattern period.