-
公开(公告)号:US20170092480A1
公开(公告)日:2017-03-30
申请号:US15000001
申请日:2016-01-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: In-Sun YI , Ki-Chul KIM , Jong-Cheol LEE , Kyu-Hee HAN , Jae-Chul SHIN , Min-Hwa JUNG , Yu-Ho Won , Seung-Han LEE , Jin-Pil HEO
IPC: H01L21/02 , C23C16/458 , C23C16/455
CPC classification number: H01L21/0262 , C23C16/4412 , C23C16/45551 , C23C16/45574 , C23C16/4584
Abstract: Provided are gas injection apparatuses, thin-film deposition equipment, and methods for manufacturing a semiconductor device. The gas injection apparatus includes: a base plate; a first gas separation region on the base plate; first and second source gas supplying regions disposed on the base plate to either side of the first gas separation region, respectively, and configured to supply a source gas; and a first reaction gas supplying region disposed at a position on the base plate other than between the first gas separation region and the first source gas supplying region and between the first gas separation region and the second source gas supplying region, and configured to supply a reaction gas, wherein the first source gas supplying region and the second source gas supplying region protrude from the base plate, wherein each of the first source gas supplying region and the second source gas supplying region has a fan-shaped upper face, and wherein the first gas separation region is defined by a side wall of the first source gas supplying region and a side wall of the second source gas supplying region, the side walls facing each other and extending in radial directions.
-
公开(公告)号:US20150115368A1
公开(公告)日:2015-04-30
申请号:US14330777
申请日:2014-07-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ki-Chul KIM , Joonghan SHIN , Bongjin KUH , Taegon KIM , Hanmei CHOI
IPC: H01L29/06 , H01L21/8238 , H01L27/092
CPC classification number: H01L29/0696 , H01L21/823807 , H01L21/845 , H01L27/092 , H01L27/1211
Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a plurality of unit cells provided on a semiconductor substrate. Each of the unit cells may include a buried insulating pattern buried in the semiconductor substrate, a first active pattern provided on the buried insulating pattern, and a second active pattern provided on the buried insulating pattern and spaced apart from the first active pattern. The buried insulating pattern may define a unit cell region, in which each of the unit cells may be disposed.
Abstract translation: 提供半导体器件及其制造方法。 半导体器件可以包括设置在半导体衬底上的多个单元电池。 每个单电池可以包括埋在半导体衬底中的掩埋绝缘图案,设置在掩埋绝缘图案上的第一有源图案和设置在掩埋绝缘图案上并与第一有源图案间隔开的第二有源图案。 埋置的绝缘图案可以限定单位单元区域,其中可以布置每个单位单元。
-
公开(公告)号:US20130213910A1
公开(公告)日:2013-08-22
申请号:US13671989
申请日:2012-11-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung-Ho KANG , Bong-Jin KUH , Ki-Seok KIM , Ki-Chul KIM , Ik-Soo KIM , Yong-Kyu JOO , Sang-Cheol HA
IPC: H01L21/683
CPC classification number: H01L21/683 , H01L21/67303 , H01L21/67309
Abstract: Provided is a boat for loading semiconductor substrates that includes a top plate and a bottom plate separated from each other, a rod extending from the bottom plate to the top plate and disposed between the top plate and the bottom plate, a plurality of buffer plates disposed between the top plate and the bottom plate and separated from each other by a first distance along a lengthwise direction of the rod, and a support provided between a first buffer plate and a second buffer plate which neighbor each other and supporting a loaded semiconductor substrate.
Abstract translation: 提供一种用于装载半导体基板的船,其包括彼此分离的顶板和底板,从底板延伸到顶板并设置在顶板和底板之间的杆,设置有多个缓冲板 在顶板和底板之间并且沿着杆的长度方向彼此分开第一距离,以及设置在彼此相邻并支撑加载的半导体衬底的第一缓冲板和第二缓冲板之间的支撑件。
-
公开(公告)号:US20130170784A1
公开(公告)日:2013-07-04
申请号:US13726346
申请日:2012-12-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ki-Chul KIM , Bong-Jin KUH , Jung-Yun WON , Eun-Ha LEE , Han-Mei CHOI
CPC classification number: G02B6/13 , G02B6/122 , G02B6/124 , G02B6/131 , G02B6/132 , G02B2006/12061 , G02B2006/121 , G02B2006/12107 , G02B2006/12147 , G02F1/025 , G02F1/035 , H01L29/66477
Abstract: A semiconductor device includes a single crystalline substrate, an electrical element and an optical element. The electrical element is disposed on the single crystalline substrate. The electrical element includes a gate electrode extending in a crystal orientation and source and drain regions adjacent to the gate electrode. The source region and the drain region are arranged in a direction substantially perpendicular to a direction in which the gate electrode extends. The optical element is disposed on the single crystalline substrate. The optical element includes an optical waveguide extending in a crystal orientation .
-
-
-