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    Semiconductor devices having shielding pattern
    1.
    发明授权
    Semiconductor devices having shielding pattern 有权
    具有屏蔽图案的半导体器件

    公开(公告)号：US09461003B1

    公开(公告)日：2016-10-04

    申请号：US14995467

    申请日：2016-01-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jimyung Kim ,  Yigwon Kim ,  Suhyun Kim ,  Kwangsub Yoon ,  Bumjoon Youn ,  Narak Choi

    IPC: H01L27/146 ,  H01L23/552 ,  H01L23/58 ,  H01L23/544

    CPC classification number: H01L23/552 ,  G03F7/70633 ,  H01L23/5225 ,  H01L23/585

    Abstract: A semiconductor device includes a circuit pattern on a substrate, a shielding pattern on the circuit pattern and constituted by a plurality of parallel bars, and lower overlay marking on the shielding pattern and constituted by a plurality of parallel bars which define parallel slits between the bars. The pitch of the bars of the shielding pattern is smaller than the pitch of the bars of the lower overlay marking.

    Abstract translation: 半导体器件包括衬底上的电路图案，电路图案上的屏蔽图案并由多个平行条构成，并且在屏蔽图案上形成下覆盖标记，并且由多个平行的条构成，所述平行条在条之间形成平行的狭缝 。 屏蔽图案的条的间距小于下覆盖标记的条的间距。

    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10096546B2

    公开(公告)日：2018-10-09

    申请号：US15704049

    申请日：2017-09-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Changseop Yoon ,  Kwangsub Yoon ,  Jongmil Youn ,  Hyung Jong Lee

    IPC: H01L23/528 ,  H01L21/8238 ,  H01L29/06 ,  H01L27/02 ,  H01L23/485

    Abstract: A semiconductor device includes a substrate including PMOSFET and NMOSFET regions, a first gate structure extending in a first direction and crossing the PMOSFET and NMOSFET regions, and a gate contact on and connected to the first gate structure, the gate contact being between the PMOSFET and NMOSFET regions, the gate contact including a first sub contact in contact with a top surface of the first gate structure, the first sub contact including a vertical extending portion extending vertically toward the substrate along one sidewall of the first gate structure, and a second sub contact spaced apart from the first gate structure, a top surface of the second sub contact being positioned at a same level as a top surface of the first sub contact.

    BLOCK COPOLYMERS AND METHODS OF MANUFACTURING INTEGRATED CIRCUIT DEVICES USING THE SAME
    5.
    发明申请
    BLOCK COPOLYMERS AND METHODS OF MANUFACTURING INTEGRATED CIRCUIT DEVICES USING THE SAME 有权

    公开(公告)号：US20250101145A1

    公开(公告)日：2025-03-27

    申请号：US18824037

    申请日：2024-09-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Changhyeon An ,  Yeonsik Jung ,  Yemin Park ,  Jeehyun Hong ,  Youngseog Kang ,  Changmin Park ,  Kwangsub Yoon ,  Jisun Lee

    IPC: C08F8/32 ,  C08F293/00 ,  H01L21/027 ,  H01L21/308

    Abstract: A block copolymer is described, such as one including a first polymer block and a second polymer block that have different structures, wherein the first polymer block includes a first unit derived from an acrylic acid ester, and the second polymer block includes an inorganic material-containing random block, in which a second unit including an inorganic material-containing group and a third unit that is devoid of an inorganic material-containing group are connected to each other to provide a concentration gradient. Also described are methods of manufacturing an integrated circuit device that include forming, on a feature layer, a block copolymer layer including the block copolymer as set forth above; phase-separating the block copolymer layer to form a structure that includes a plurality of first domains that each include the first polymer block, and at least one second domain including the second polymer block; removing the plurality of first domains; and etching the feature layer using the at least one second domain as an etch mask.

    Semiconductor device
    7.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10211156B2

    公开(公告)日：2019-02-19

    申请号：US16119475

    申请日：2018-08-31

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Changseop Yoon ,  Kwangsub Yoon ,  Jongmil Youn ,  Hyung Jong Lee

    IPC: H01L23/528 ,  H01L21/8238 ,  H01L27/02 ,  H01L23/485 ,  H01L29/06

    Abstract: A semiconductor device includes a substrate including PMOSFET and NMOSFET regions, a first gate structure extending in a first direction and crossing the PMOSFET and NMOSFET regions, and a gate contact on and connected to the first gate structure, the gate contact being between the PMOSFET and NMOSFET regions, the gate contact including a first sub contact in contact with a top surface of the first gate structure, the first sub contact including a vertical extending portion extending vertically toward the substrate along one sidewall of the first gate structure, and a second sub contact spaced apart from the first gate structure, a top surface of the second sub contact being positioned at a same level as a top surface of the first sub contact.

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