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公开(公告)号：US10008984B2
公开(公告)日：2018-06-26
申请号：US15419668
申请日：2017-01-30
CPC分类号： H03F1/0233 , H03F1/0222 , H03F3/193 , H03F3/245 , H03F3/45179 , H03F3/45183 , H03F3/45197 , H03F2200/102 , H03F2200/153 , H03F2200/381 , H03F2200/451 , H03F2200/462 , H03F2200/546 , H03F2200/91 , H03F2203/30036 , H03F2203/45112 , H04B1/04 , H04B2001/0416
摘要： An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.
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公开(公告)号：US09559646B2
公开(公告)日：2017-01-31
申请号：US14819088
申请日：2015-08-05
CPC分类号： H03F1/0233 , H03F1/0222 , H03F3/193 , H03F3/245 , H03F3/45179 , H03F3/45183 , H03F3/45197 , H03F2200/102 , H03F2200/153 , H03F2200/381 , H03F2200/451 , H03F2200/462 , H03F2200/546 , H03F2200/91 , H03F2203/30036 , H03F2203/45112 , H04B1/04 , H04B2001/0416
摘要： A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor.
摘要翻译： 提供了一种动态偏置的基带电流放大器。 动态偏置的基带电流放大器包括输入接口; 控制器 可变电阻网络; 放大器级; 混合差分包络检波器和全波整流器; 跨导体 第一可变晶体管; 第二可变晶体管; 第三可变晶体管; 和第四可变晶体管。
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3.发明授权Apparatus and method for hybrid differential envelope detector and full-wave rectifier 有权用于混合差分包络检波器和全波整流器的装置和方法公开(公告)号：US09362895B2
公开(公告)日：2016-06-07
申请号：US14821270
申请日：2015-08-07
发明人： Siddharth Seth , Sang Won Son , Thomas Cho
CPC分类号： H03K3/012 , G01R19/04 , H02M7/217 , H03K5/1532
摘要： A first and second hybrid envelope detector and full-wave rectifier is provided. The first hybrid envelope detector and full-wave rectifier includes a first P-channel Field Effect Transistor (PFET); a second PFET; a first N-channel Field Effect Transistor (NFET); a second NFET; a third NFET; a fourth NFET; a fifth NFET; a controller; a variable transistor; and a variable capacitor. The second hybrid envelope detector and full-wave rectifier includes a first N-channel Field Effect Transistor (NFET); a second NFET; a first P-channel Field Effect Transistor (PFET); a second PFET; a third PFET; a fourth PFET; a fifth PFET; a controller; a variable transistor; and a variable capacitor.
摘要翻译： 提供第一和第二混合包络检测器和全波整流器。 第一混合包络检波器和全波整流器包括第一P沟道场效应晶体管（PFET）; 第二个PFET; 第一N沟道场效应晶体管（NFET）; 第二个NFET; 第三个NFET; 第四个NFET; 第五个NFET; 控制器 可变晶体管; 和可变电容器。 第二混合包络检测器和全波整流器包括第一N沟道场效应晶体管（NFET）; 第二个NFET; 第一P沟道场效应晶体管（PFET）; 第二个PFET; 第三个PFET; 第四个PFET; 第五个PFET; 控制器 可变晶体管; 和可变电容器。
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公开(公告)号：US10312861B2
公开(公告)日：2019-06-04
申请号：US15608254
申请日：2017-05-30
发明人： Venumadhav Bhagavatula , Sriramkumar Venugopalan , Siddharth Seth , Siuchuang Ivan Lu , Sang Won Son
IPC分类号： H03K5/00 , H03D7/12 , H03H11/28 , H03H11/32 , H03K17/691 , H03K17/693 , H03D7/14
摘要： An apparatus and method are provided. The apparatus includes a multiplexer, including first, second, and third inputs, and an output; a first transistor, including a gate connected to the multiplexer, and first and second terminals; a first variable capacitor, including a first terminal connected to the first transistor, a second terminal, and an input; a first inductor, including a first terminal connected to the first transistor, and a second terminal connected to the second terminal of the first variable capacitor; a second transistor, including a gate connected to the output of the multiplexer, a first terminal, and a second terminal connected to the second terminal of the first inductor; a second inductor mutually coupled to the first inductor, including a first and second terminals; and a balun-bias switch, including first, second, and third inputs, and an output connected to the second terminal of the second inductor.
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公开(公告)号：US09923529B2
公开(公告)日：2018-03-20
申请号：US15137349
申请日：2016-04-25
发明人： Siddharth Seth , Venumadhav Bhagavatula , Ivan Lu , Sang Won Son
CPC分类号： H03F3/245 , H03F3/19 , H03F3/217 , H03F3/24 , H03F2200/451 , H04B1/0475 , H04B2001/0408 , H04L5/22 , H04W72/1263
摘要： Apparatuses, systems, and methods for a digital power amplifier (DPA) to generate a monotonic and linear ramp-up and ramp-down for a time division multiple access (TDMA) slot transmission are described. In one aspect, a monotonic and linear amplitude-to-control input code relationship model is generated for the DPA and stored. When the DPA needs to generate a ramp-up or ramp-down, the stored monotonic and linear amplitude-to-control input code relationship model is used to shape the input control code before it is input into the DPA. A new monotonic and linear amplitude-to-control input code relationship model may be generated and stored if the operating conditions change. The apparatuses, systems, and methods described herein may be applied to a multi-standard broadband modem chip capable of 2G transmission.
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公开(公告)号：US09667228B2
公开(公告)日：2017-05-30
申请号：US15065433
申请日：2016-03-09
发明人： Venumadhav Bhagavatula , Sriramkumar Venugopalan , Siddharth Seth , Siuchuang Ivan Lu , Sang Won Son
IPC分类号： H03H7/40 , H03H11/28 , H03H11/32 , H03K17/691 , H03K17/693 , H03D7/12
CPC分类号： H03D7/125 , H03D7/1441 , H03D7/1458 , H03D7/1466 , H03H11/28 , H03H11/32 , H03K17/691 , H03K17/693
摘要： An apparatus and method are provided. The apparatus includes a multiplexer, including a first input, a second input, a third input, and an output; a first transistor, including a gate, a first terminal, and a second terminal; a first variable capacitor, including a first terminal, a second terminal, and an input; a first inductor, including a first terminal and a second terminal; a second transistor, including a gate, a first terminal, and a second terminal; a second inductor mutually coupled to the first inductor, including a first terminal and a second terminal; a balun-bias switch, including a first input, a second input, a third input, and an output; a second capacitor, including a first terminal, and a second terminal; and a port-switch, including a first input, a second input, a third input, and an output.
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公开(公告)号：US20170141737A1
公开(公告)日：2017-05-18
申请号：US15419668
申请日：2017-01-30
CPC分类号： H03F1/0233 , H03F1/0222 , H03F3/193 , H03F3/245 , H03F3/45179 , H03F3/45183 , H03F3/45197 , H03F2200/102 , H03F2200/153 , H03F2200/381 , H03F2200/451 , H03F2200/462 , H03F2200/546 , H03F2200/91 , H03F2203/30036 , H03F2203/45112 , H04B1/04 , H04B2001/0416
摘要： An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.
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8.发明授权Apparatus and method of fine capacitance tuning for high resolution digitally controlled oscillator 有权用于高分辨率数字控制振荡器的精细电容调谐的装置和方法公开(公告)号：US09520829B1
公开(公告)日：2016-12-13
申请号：US14964243
申请日：2015-12-09
发明人： Sunghwan Kim , Wing Fai Loke , Siddharth Seth
CPC分类号： H03B5/1293 , H01G15/00 , H03B5/1215 , H03B5/1243 , H03B5/1265 , H03B5/28
摘要： An apparatus and a method are provided. The apparatus includes a first capacitor, including a first end and a second end; a second capacitor, including a first end connected to the second end of the first capacitor, and a second end; a variable capacitor, including a first end connected to the second end of the first capacitor, and a second end; a third capacitor, including a first end connected to the first end of the first capacitor, and a second end connected to the second end of the variable capacitor; and a fourth capacitor, including a first end connected to the second end of the third capacitor, and a second end connected to the second end of the second capacitor.
摘要翻译： 提供了一种装置和方法。 该装置包括：第一电容器，包括第一端和第二端; 第二电容器，包括连接到第一电容器的第二端的第一端和第二端; 可变电容器，包括连接到第一电容器的第二端的第一端和第二端; 第三电容器，包括连接到第一电容器的第一端的第一端和连接到可变电容器的第二端的第二端; 以及第四电容器，包括连接到第三电容器的第二端的第一端和连接到第二电容器的第二端的第二端。
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