公开(公告)号：US09698158B2

公开(公告)日：2017-07-04

申请号：US15248564

申请日：2016-08-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won-Seok Jung ,  Changseok Kang ,  Seungwoo Paek ,  Inseok Yang ,  Kyungjoong Joo

IPC: H01L21/336 ,  H01L27/11582 ,  H01L27/11575 ,  H01L27/11573

CPC classification number: H01L27/11582 ,  H01L27/11573 ,  H01L27/11575

Abstract: A semiconductor device includes a substrate, a stack structure, peripheral gate structures and residual spacers. The substrate includes a cell array region and a peripheral circuit region. The stack structure is disposed on the cell array region, having electrodes and insulating layers alternately stacked. The peripheral gate structures are disposed on the peripheral circuit region, being spaced apart from each other in one direction and having a peripheral gate pattern disposed on the substrate, and a peripheral gate spacer disposed on a sidewall of the peripheral gate pattern. The residual spacers are disposed on sidewalls of the peripheral gate structures, having a sacrificial pattern and an insulating pattern that are stacked. The insulating pattern includes substantially the same material as the insulating layers of the stack structure.

公开(公告)号：US20240379647A1

公开(公告)日：2024-11-14

申请号：US18780646

申请日：2024-07-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uidam Jung ,  Youngbum Woo ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek

IPC: H01L25/18 ,  H01L23/00 ,  H10B43/10 ,  H10B43/27

Abstract: A semiconductor device includes an insulating structure; a plurality of horizontal layers vertically stacked and spaced apart from each other in the insulating structure; a conductive material pattern contacting the insulating structure; and a vertical structure penetrating through the plurality of horizontal layers and extending into the conductive material pattern in the insulating structure. Each of the plurality of horizontal layers comprises a conductive material, the vertical structure comprises a vertical portion and a protruding portion, the vertical portion of the vertical structure penetrates through the plurality of horizontal layers, the protruding portion of the vertical structure extends from the vertical portion into the conductive material pattern, a width of the vertical portion is greater than a width of the protruding portion, and a side surface of the protruding portion is in contact with the conductive material pattern.

公开(公告)号：US11527524B2

公开(公告)日：2022-12-13

申请号：US17030887

申请日：2020-09-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uidam Jung ,  Youngbum Woo ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek

IPC: H01L25/18 ,  H01L27/11565 ,  H01L27/11582 ,  H01L23/00

Abstract: A semiconductor device includes an insulating structure; a plurality of horizontal layers vertically stacked and spaced apart from each other in the insulating structure; a conductive material pattern contacting the insulating structure; and a vertical structure penetrating through the plurality of horizontal layers and extending into the conductive material pattern in the insulating structure. Each of the plurality of horizontal layers comprises a conductive material, the vertical structure comprises a vertical portion and a protruding portion, the vertical portion of the vertical structure penetrates through the plurality of horizontal layers, the protruding portion of the vertical structure extends from the vertical portion into the conductive material pattern, a width of the vertical portion is greater than a width of the protruding portion, and a side surface of the protruding portion is in contact with the conductive material pattern.

公开(公告)号：US20250087531A1

公开(公告)日：2025-03-13

申请号：US18955826

申请日：2024-11-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangjun Park ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek ,  Sungdong Cho

IPC: H01L21/768 ,  H01L23/00 ,  H01L23/522 ,  H01L25/065 ,  H01L25/18

Abstract: A semiconductor chip structure includes a first semiconductor chip that includes a first chip region and a first scribe lane region and a second semiconductor chip that includes a second chip region and a second scribe lane region respectively bonded to the first chip region and the first scribe lane region. The first semiconductor chip includes a first bonding wiring layer that includes a first bonding insulating layer and a first bonding electrode in the first bonding insulating layer. The second semiconductor chip includes a second bonding wiring layer that includes a second bonding insulating layer and a second bonding electrode in the second bonding insulating layer and a polishing stop pattern. The first bonding insulating layer and the first bonding electrode of the first bonding wiring layer are respectively hybrid bonded to the second bonding insulating layer and the second bonding electrode of the second bonding wiring layer.

公开(公告)号：US20240334716A1

公开(公告)日：2024-10-03

申请号：US18417970

申请日：2024-01-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Moorym Choi ,  Seungwoo Paek ,  Sunil Shim ,  Yunsun Jang

IPC: H10B80/00 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

CPC classification number: H10B80/00 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/08145 ,  H01L2224/80006 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A semiconductor device includes a first semiconductor structure including circuit elements on a first substrate, a lower interconnection structure on the circuit elements, and a lower bonding structure on the lower interconnection structure; and a second semiconductor structure including a second substrate on the first semiconductor structure, separation insulating patterns separating the second substrate, and disposed to be spaced apart from each other, gate electrodes stacked to be spaced apart from each other, separation regions passing through the gate electrodes, and disposed to be spaced apart from each other, channel structures passing through the gate electrodes, an upper interconnection structure below the gate electrodes, and an upper bonding structure bonded to the lower bonding structure, wherein the separation insulating patterns include first separation insulating patterns on the separation regions, and second separation insulating patterns between the channel structures and passing through the second substrate.

公开(公告)号：US11990450B2

公开(公告)日：2024-05-21

申请号：US17315716

申请日：2021-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunji Kim ,  Seungwoo Paek ,  Byungkyu Kim ,  Sangjun Park ,  Sungdong Cho

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L23/538 ,  H01L29/423 ,  H10B43/40 ,  H10B43/27 ,  H10B43/35

CPC classification number: H01L25/0657 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/08 ,  H01L29/42344 ,  H10B43/40 ,  H01L2224/08146 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/1431 ,  H01L2924/1438 ,  H10B43/27 ,  H10B43/35

Abstract: A device including a first structure and a second structure is provided. The device includes a substrate, a peripheral circuit and first junction pads on the substrate; a first insulating structure surrounding side surfaces of the first junction pads; second junction pads contacting the first junction pads; a second insulating structure on the first insulating structure; a passivation layer on the second insulating structure; an upper insulating structure between the passivation layer and the second insulating structure; a barrier capping layer between the upper insulating structure and the passivation layer; conductive patterns spaced apart from each other in the upper insulating structure; a first pattern structure between the upper insulating structure and the second insulating structure; a stack structure between the second insulating structure and the first pattern structure, and including gate layers; and a vertical structure passing through the stack structure and including a data storage structure and a channel layer.

公开(公告)号：US12176245B2

公开(公告)日：2024-12-24

申请号：US17453504

申请日：2021-11-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangjun Park ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek ,  Sungdong Cho

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

Abstract: A semiconductor chip structure includes a first semiconductor chip that includes a first chip region and a first scribe lane region and a second semiconductor chip that includes a second chip region and a second scribe lane region respectively bonded to the first chip region and the first scribe lane region. The first semiconductor chip includes a first bonding wiring layer that includes a first bonding insulating layer and a first bonding electrode in the first bonding insulating layer. The second semiconductor chip includes a second bonding wiring layer that includes a second bonding insulating layer and a second bonding electrode in the second bonding insulating layer and a polishing stop pattern. The first bonding insulating layer and the first bonding electrode of the first bonding wiring layer are respectively hybrid bonded to the second bonding insulating layer and the second bonding electrode of the second bonding wiring layer.

公开(公告)号：US12080699B2

公开(公告)日：2024-09-03

申请号：US18054172

申请日：2022-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uidam Jung ,  Youngbum Woo ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek

IPC: H01L25/18 ,  H01L23/00 ,  H01L27/11582 ,  H10B43/10 ,  H10B43/27

CPC classification number: H01L25/18 ,  H01L24/05 ,  H01L24/08 ,  H01L24/29 ,  H01L24/32 ,  H10B43/10 ,  H10B43/27 ,  H01L2224/0557 ,  H01L2224/08145 ,  H01L2224/29186 ,  H01L2224/32145 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A semiconductor device includes an insulating structure; a plurality of horizontal layers vertically stacked and spaced apart from each other in the insulating structure; a conductive material pattern contacting the insulating structure; and a vertical structure penetrating through the plurality of horizontal layers and extending into the conductive material pattern in the insulating structure. Each of the plurality of horizontal layers comprises a conductive material, the vertical structure comprises a vertical portion and a protruding portion, the vertical portion of the vertical structure penetrates through the plurality of horizontal layers, the protruding portion of the vertical structure extends from the vertical portion into the conductive material pattern, a width of the vertical portion is greater than a width of the protruding portion, and a side surface of the protruding portion is in contact with the conductive material pattern.

公开(公告)号：US20230067443A1

公开(公告)日：2023-03-02

申请号：US18054172

申请日：2022-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uidam Jung ,  Youngbum Woo ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek

IPC: H01L25/18 ,  H01L27/11582 ,  H01L27/11565 ,  H01L23/00

Abstract: A semiconductor device includes an insulating structure; a plurality of horizontal layers vertically stacked and spaced apart from each other in the insulating structure; a conductive material pattern contacting the insulating structure; and a vertical structure penetrating through the plurality of horizontal layers and extending into the conductive material pattern in the insulating structure. Each of the plurality of horizontal layers comprises a conductive material, the vertical structure comprises a vertical portion and a protruding portion, the vertical portion of the vertical structure penetrates through the plurality of horizontal layers, the protruding portion of the vertical structure extends from the vertical portion into the conductive material pattern, a width of the vertical portion is greater than a width of the protruding portion, and a side surface of the protruding portion is in contact with the conductive material pattern.

公开(公告)号：US20210202458A1

公开(公告)日：2021-07-01

申请号：US17030887

申请日：2020-09-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uidam Jung ,  Youngbum Woo ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek

IPC: H01L25/18 ,  H01L27/11582 ,  H01L27/11565 ,  H01L23/00

Abstract: A semiconductor device includes an insulating structure; a plurality of horizontal layers vertically stacked and spaced apart from each other in the insulating structure; a conductive material pattern contacting the insulating structure; and a vertical structure penetrating through the plurality of horizontal layers and extending into the conductive material pattern in the insulating structure. Each of the plurality of horizontal layers comprises a conductive material, the vertical structure comprises a vertical portion and a protruding portion, the vertical portion of the vertical structure penetrates through the plurality of horizontal layers, the protruding portion of the vertical structure extends from the vertical portion into the conductive material pattern, a width of the vertical portion is greater than a width of the protruding portion, and a side surface of the protruding portion is in contact with the conductive material pattern.