公开(公告)号：US11990450B2

公开(公告)日：2024-05-21

申请号：US17315716

申请日：2021-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunji Kim ,  Seungwoo Paek ,  Byungkyu Kim ,  Sangjun Park ,  Sungdong Cho

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L23/538 ,  H01L29/423 ,  H10B43/40 ,  H10B43/27 ,  H10B43/35

CPC classification number: H01L25/0657 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/08 ,  H01L29/42344 ,  H10B43/40 ,  H01L2224/08146 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/1431 ,  H01L2924/1438 ,  H10B43/27 ,  H10B43/35

Abstract: A device including a first structure and a second structure is provided. The device includes a substrate, a peripheral circuit and first junction pads on the substrate; a first insulating structure surrounding side surfaces of the first junction pads; second junction pads contacting the first junction pads; a second insulating structure on the first insulating structure; a passivation layer on the second insulating structure; an upper insulating structure between the passivation layer and the second insulating structure; a barrier capping layer between the upper insulating structure and the passivation layer; conductive patterns spaced apart from each other in the upper insulating structure; a first pattern structure between the upper insulating structure and the second insulating structure; a stack structure between the second insulating structure and the first pattern structure, and including gate layers; and a vertical structure passing through the stack structure and including a data storage structure and a channel layer.

公开(公告)号：US11570486B2

公开(公告)日：2023-01-31

申请号：US17183835

申请日：2021-02-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jiwon Kim ,  Eunji Kim

IPC: H04N21/218 ,  H04N21/222 ,  G06T19/00 ,  H04N21/44 ,  H04N13/161 ,  H04N21/226

Abstract: An example method, performed by an edge data network, of transmitting video content includes: obtaining first bearing information from an electronic device connected to the edge data network; determining second predicted bearing information based on the first bearing information; determining a second predicted partial image corresponding to the second predicted bearing information; transmitting, to the electronic device, a second predicted frame generated by encoding the second predicted partial image; obtaining, from the electronic device, second bearing information corresponding to a second partial image; comparing the second predicted bearing information to the obtained second bearing information; generating, based on a result of the comparing, a compensation frame using at least two of a first partial image corresponding to the first bearing information, the second predicted partial image, or the second partial image corresponding to the second bearing information; and transmitting the generated compensation frame to the electronic device based on the result of the comparing.

公开(公告)号：US20220036182A1

公开(公告)日：2022-02-03

申请号：US17372808

申请日：2021-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsik Park ,  Youngchun Kwon ,  Dongseon Lee ,  Younsuk Choi ,  Eunji Kim

IPC: G06N3/08 ,  G06N3/04

Abstract: An apparatus for generating a target product by using a neural network is configured to: predict candidate reactant combinations for generating the target product by using a pre-trained retrosynthesis prediction model; predict a prediction product with respect to each of the candidate reactant combinations by using a pre-trained reaction prediction model; and determine an experimental priority order of the candidate reactant combinations based on a result of comparing the target product with the prediction product.

公开(公告)号：US20240379647A1

公开(公告)日：2024-11-14

申请号：US18780646

申请日：2024-07-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uidam Jung ,  Youngbum Woo ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek

IPC: H01L25/18 ,  H01L23/00 ,  H10B43/10 ,  H10B43/27

Abstract: A semiconductor device includes an insulating structure; a plurality of horizontal layers vertically stacked and spaced apart from each other in the insulating structure; a conductive material pattern contacting the insulating structure; and a vertical structure penetrating through the plurality of horizontal layers and extending into the conductive material pattern in the insulating structure. Each of the plurality of horizontal layers comprises a conductive material, the vertical structure comprises a vertical portion and a protruding portion, the vertical portion of the vertical structure penetrates through the plurality of horizontal layers, the protruding portion of the vertical structure extends from the vertical portion into the conductive material pattern, a width of the vertical portion is greater than a width of the protruding portion, and a side surface of the protruding portion is in contact with the conductive material pattern.

公开(公告)号：US11527524B2

公开(公告)日：2022-12-13

申请号：US17030887

申请日：2020-09-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uidam Jung ,  Youngbum Woo ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek

IPC: H01L25/18 ,  H01L27/11565 ,  H01L27/11582 ,  H01L23/00

Abstract: A semiconductor device includes an insulating structure; a plurality of horizontal layers vertically stacked and spaced apart from each other in the insulating structure; a conductive material pattern contacting the insulating structure; and a vertical structure penetrating through the plurality of horizontal layers and extending into the conductive material pattern in the insulating structure. Each of the plurality of horizontal layers comprises a conductive material, the vertical structure comprises a vertical portion and a protruding portion, the vertical portion of the vertical structure penetrates through the plurality of horizontal layers, the protruding portion of the vertical structure extends from the vertical portion into the conductive material pattern, a width of the vertical portion is greater than a width of the protruding portion, and a side surface of the protruding portion is in contact with the conductive material pattern.

公开(公告)号：US12176245B2

公开(公告)日：2024-12-24

申请号：US17453504

申请日：2021-11-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangjun Park ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek ,  Sungdong Cho

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

Abstract: A semiconductor chip structure includes a first semiconductor chip that includes a first chip region and a first scribe lane region and a second semiconductor chip that includes a second chip region and a second scribe lane region respectively bonded to the first chip region and the first scribe lane region. The first semiconductor chip includes a first bonding wiring layer that includes a first bonding insulating layer and a first bonding electrode in the first bonding insulating layer. The second semiconductor chip includes a second bonding wiring layer that includes a second bonding insulating layer and a second bonding electrode in the second bonding insulating layer and a polishing stop pattern. The first bonding insulating layer and the first bonding electrode of the first bonding wiring layer are respectively hybrid bonded to the second bonding insulating layer and the second bonding electrode of the second bonding wiring layer.

公开(公告)号：US12080699B2

公开(公告)日：2024-09-03

申请号：US18054172

申请日：2022-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uidam Jung ,  Youngbum Woo ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek

IPC: H01L25/18 ,  H01L23/00 ,  H01L27/11582 ,  H10B43/10 ,  H10B43/27

CPC classification number: H01L25/18 ,  H01L24/05 ,  H01L24/08 ,  H01L24/29 ,  H01L24/32 ,  H10B43/10 ,  H10B43/27 ,  H01L2224/0557 ,  H01L2224/08145 ,  H01L2224/29186 ,  H01L2224/32145 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A semiconductor device includes an insulating structure; a plurality of horizontal layers vertically stacked and spaced apart from each other in the insulating structure; a conductive material pattern contacting the insulating structure; and a vertical structure penetrating through the plurality of horizontal layers and extending into the conductive material pattern in the insulating structure. Each of the plurality of horizontal layers comprises a conductive material, the vertical structure comprises a vertical portion and a protruding portion, the vertical portion of the vertical structure penetrates through the plurality of horizontal layers, the protruding portion of the vertical structure extends from the vertical portion into the conductive material pattern, a width of the vertical portion is greater than a width of the protruding portion, and a side surface of the protruding portion is in contact with the conductive material pattern.

公开(公告)号：US11749614B2

公开(公告)日：2023-09-05

申请号：US17340445

申请日：2021-06-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongyeop Kim ,  Seil Oh ,  Eunji Kim ,  Kwangwuk Park ,  Jihak Yu

IPC: H01L23/544 ,  H01L25/065 ,  H01L23/48

CPC classification number: H01L23/544 ,  H01L23/481 ,  H01L25/0657 ,  H01L2223/54426 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2225/06593

Abstract: A through-silicon via (TSV) key for overlay measurement includes: a first TSV extending through at least a portion of a substrate in a first direction that is perpendicular to a top surface of the substrate; and at least one ring pattern, which is apart from and surrounds the first TSV in a second direction that is parallel to the top surface of the substrate, the at least one ring pattern being arranged in a layer that is lower than a top surface of the first TSV in the first direction, wherein an inner measurement point corresponds to the first TSV, an outer measurement point corresponds to the at least one ring pattern, and the inner measurement point and the outer measurement point are arranged to provide an overlay measurement of a TSV.

公开(公告)号：US20230067443A1

公开(公告)日：2023-03-02

申请号：US18054172

申请日：2022-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uidam Jung ,  Youngbum Woo ,  Byungkyu Kim ,  Eunji Kim ,  Seungwoo Paek

IPC: H01L25/18 ,  H01L27/11582 ,  H01L27/11565 ,  H01L23/00

Abstract: A semiconductor device includes an insulating structure; a plurality of horizontal layers vertically stacked and spaced apart from each other in the insulating structure; a conductive material pattern contacting the insulating structure; and a vertical structure penetrating through the plurality of horizontal layers and extending into the conductive material pattern in the insulating structure. Each of the plurality of horizontal layers comprises a conductive material, the vertical structure comprises a vertical portion and a protruding portion, the vertical portion of the vertical structure penetrates through the plurality of horizontal layers, the protruding portion of the vertical structure extends from the vertical portion into the conductive material pattern, a width of the vertical portion is greater than a width of the protruding portion, and a side surface of the protruding portion is in contact with the conductive material pattern.

公开(公告)号：US11195496B2

公开(公告)日：2021-12-07

申请号：US16922071

申请日：2020-07-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Nam ,  Eunji Kim ,  Sangik Bang

IPC: G09G5/36

Abstract: An electronic device and method are disclosed herein. The electronic device includes a display and processor. The processor implements the method including executing an application, and based on detecting a frame drop, identifying an insertion position of an interpolation image for a plurality of images generated by execution of the application. An interpolation image is generated based on the identified insertion position and the interpolation image is inserted into the plurality of images at the identified insertion position.