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Patent Agency Ranking
公开(公告)号：US20170033225A1
公开(公告)日：2017-02-02
申请号：US15290269
申请日：2016-10-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： JUNG-HWAN KIM , HUN-HYEOUNG LEAM , TAE-HYUN KIM , SEOK-WOO NAM , HYUN NAMKOONG , YONG-SEOK KIM , TEA-KWANG YU
IPC: H01L29/78 , H01L27/115 , H01L29/66 , H01L21/762 , H01L21/308
CPC classification number: H01L29/785 , H01L21/28282 , H01L21/308 , H01L21/76224 , H01L21/76232 , H01L21/823481 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/0649 , H01L29/0653 , H01L29/0657 , H01L29/1079 , H01L29/42352 , H01L29/66818 , H01L29/66833 , H01L29/7851 , H01L29/7854 , H01L2029/7858
Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
Abstract translation: 半导体器件包括限定形成在半导体衬底中的有源区的隔离层。 在隔离层上执行第一凹陷处理以暴露活性区域的边缘部分。 执行第一舍入处理以围绕活动区域的边缘部分。 在隔离层上进行第二凹陷处理。 执行第二舍入处理以围绕活动区域的边缘部分。
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公开(公告)号：US20150179799A1
公开(公告)日：2015-06-25
申请号：US14635034
申请日：2015-03-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JUNG-HWAN KIM , HUN-HYEOUNG LEAM , TAE-HYUN KIM , SEOK-WOO NAM , HYUN NAMKOONG , YONG-SEOK KIM , TEA-KWANG YU
CPC classification number: H01L29/785 , H01L21/28282 , H01L21/308 , H01L21/76224 , H01L21/76232 , H01L21/823481 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/0649 , H01L29/0653 , H01L29/0657 , H01L29/1079 , H01L29/42352 , H01L29/66818 , H01L29/66833 , H01L29/7851 , H01L29/7854 , H01L2029/7858
Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
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公开(公告)号：US20180075918A1
公开(公告)日：2018-03-15
申请号：US15822320
申请日：2017-11-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： TAE-HYUN KIM , BONG-SOON LIM , YOON-HEE CHOI , SANG-WON SHIM
CPC classification number: G11C16/3459 , G06F11/1068 , G11C16/08 , G11C16/10 , G11C16/26 , G11C29/52
Abstract: A memory device has a memory cell array with memory cells. A page buffer group generates page buffer signals according to a verify read result of the memory cells. A page buffer decoding unit generates a decoder output signal corresponding to the number of fail bits from the page buffer signals based on a first reference current. A slow bit counter outputs a count result corresponding to the number of fail bits from the decoder output signal based on a second reference current corresponding to M times the first reference current, where M is a positive integer. A pass/fail checking unit determines a program outcome with respect to the memory cells based on the count result and outputs a pass signal or a fail signal based on the determined program outcome.
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公开(公告)号：US20150340097A1
公开(公告)日：2015-11-26
申请号：US14716550
申请日：2015-05-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： TAE-HYUN KIM , YOUNG-SUN MIN , SUNG-WHAN SEO , WON-TAE KIM , SANG-WAN NAM
CPC classification number: G11C16/26 , G11C5/147 , G11C7/04 , G11C16/30 , G11C16/349 , G11C29/021 , G11C29/028 , H02M3/158
Abstract: A voltage generator includes a first trim unit and a second trim unit. The first trim unit generates a first voltage variable depending on temperature variation and a second voltage invariable irrespective of the temperature variation based on a power supply voltage, and performs a first trim operation by changing a level of the second voltage. The level of the second voltage at a first temperature becomes substantially the same as a level of the first voltage at the first temperature based on the first trim operation. The second trim unit generates an output voltage based on the power supply voltage, the first and second voltages, a reference voltage and a feedback voltage, and performs a second trim operation by adjusting variation of the output voltage depending on the temperature variation based on a result of the first trim operation.
Abstract translation: 电压发生器包括第一调整单元和第二调整单元。 第一微调单元根据温度变化产生第一电压变量，而不管基于电源电压的温度变化而产生第二电压，并且通过改变第二电压的电平来执行第一微调操作。 基于第一调整操作，第一温度下的第二电压的电平变得与第一温度下的第一电压的电平基本相同。 第二微调单元基于电源电压，第一和第二电压，参考电压和反馈电压产生输出电压，并且通过基于温度变化调整输出电压的变化来执行第二微调操作 第一次修剪操作的结果。
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公开(公告)号：US20150137320A1
公开(公告)日：2015-05-21
申请号：US14538046
申请日：2014-11-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JUNG-HWAN KIM , HUN-HYEOUNG LEAM , TAE-HYUN KIM , SEOK-WOO NAM , HYUN NAMKOONG , YONG-SEOK KIM , TEA-KWANG YU
CPC classification number: H01L29/785 , H01L21/28282 , H01L21/308 , H01L21/76224 , H01L21/76232 , H01L21/823481 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/0649 , H01L29/0653 , H01L29/0657 , H01L29/1079 , H01L29/42352 , H01L29/66818 , H01L29/66833 , H01L29/7851 , H01L29/7854 , H01L2029/7858
Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
Abstract translation: 半导体器件包括限定形成在半导体衬底中的有源区的隔离层。 在隔离层上执行第一凹陷处理以暴露活性区域的边缘部分。 执行第一舍入处理以围绕活动区域的边缘部分。 在隔离层上进行第二凹陷处理。 执行第二舍入处理以围绕活动区域的边缘部分。
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