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    INTERNAL PRESSURE CONTROL APPARATUS AND SUBSTRATE PROCESSING APPARATUS INCLUDING THE SAME
    1.
    发明公开
    INTERNAL PRESSURE CONTROL APPARATUS AND SUBSTRATE PROCESSING APPARATUS INCLUDING THE SAME 审中-公开

    公开(公告)号：US20240304427A1

    公开(公告)日：2024-09-12

    申请号：US18538419

    申请日：2023-12-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sang Ki NAM ,  Tae-Hyun KIM ,  Sung Ho JANG ,  Seul Gi LEE

    IPC: H01J37/32 ,  H01L21/67

    CPC classification number: H01J37/32834 ,  H01J37/32449 ,  H01J37/32642 ,  H01L21/67069 ,  H01J2237/3341

    Abstract: The present disclosure relates to an internal pressure control apparatus capable of uniformly processing an upper surface of a semiconductor substrate and a substrate processing apparatus including the same. The substrate processing apparatus comprising a chamber housing including an exhaust hole for exhausting a process gas flowing thereinto, a substrate support unit inside the chamber housing, supporting a semiconductor substrate, a process gas supply unit providing the process gas to the inside of the chamber housing, a plasma generating unit generating plasma inside the chamber housing by using the process gas, and a ring body installed around the substrate support unit and provided as one body, and further comprising an internal pressure control apparatus controlling an internal pressure of the chamber housing, wherein the internal pressure control apparatus controls a posture of the ring body to control an exhaust amount of the process gas flowing into the chamber housing.

    MEMORY DEVICE INCLUDING NAND STRINGS AND METHOD OF OPERATING THE SAME
    2.
    发明申请
    MEMORY DEVICE INCLUDING NAND STRINGS AND METHOD OF OPERATING THE SAME 审中-公开

    公开(公告)号：US20190035466A1

    公开(公告)日：2019-01-31

    申请号：US16035958

    申请日：2018-07-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Wan-Dong KIM ,  Tae-Hyun KIM ,  Sang-Wan NAM ,  Sang-Soo PARK ,  Jae-Yong JEONG

    IPC: G11C16/04 ,  G11C16/08 ,  G11C16/28 ,  G11C16/10

    Abstract: To operate a memory device including a plurality of NAND strings, an unselected NAND string among a plurality of NAND strings is floated when a voltage of a selected word line is increased such that a channel voltage of the unselected NAND string is boosted. The channel voltage of the unselected NAND string may be discharged when the voltage of the selected word line is decreased. The load when the voltage of the selected word line increases may be reduced by floating the unselected NAND string to boost the channel voltage of the unselected NAND string together with the increase of the voltage of the selected word line. The load when the voltage of the selected word line is decreased may be reduced by discharging the boosted channel voltage of the unselected NAND string when the voltage of the selected word line is decreased. Through such reduction of the load of the selected word line, a voltage setup time may be reduced and an operation speed of the memory device may be enhanced.

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