WET ETCHING METHOD AND METHOD OF  FABRICATING SEMICONDUCTOR DEVICE BY  USING THE SAME

    公开(公告)号:US20230230843A1

    公开(公告)日:2023-07-20

    申请号:US18095798

    申请日:2023-01-11

    CPC classification number: H01L21/31111 H01L29/66666 H10B80/00

    Abstract: A wet etching method includes: providing a structure including an etching target film into a process bath containing a first etching solution having a first phosphoric acid concentration; performing a first etching process for etching the etching target film with the first etching solution in the process bath; providing a second etching solution having a second phosphoric acid concentration different from the first phosphoric acid concentration by changing a phosphoric acid concentration in the first etching solution; performing a second etching process for etching the etching target film with the second etching solution in the process bath; providing a third etching solution having a third phosphoric acid concentration different from the first and second phosphoric acid concentrations by changing a phosphoric acid concentration in the second etching solution; and performing a third etching process for etching the etching target film with the third etching solution in the process bath.

    Method and apparatus for plasma etching

    公开(公告)号:US10580617B2

    公开(公告)日:2020-03-03

    申请号:US15841230

    申请日:2017-12-13

    Abstract: A plasma etching apparatus includes an etching chamber and at least one processor. The etching chamber is configured to support a target therein. The at least one processor is configured to: determine a process condition for plasma etching the target before execution of a plasma etching process; and control an aspect of the chamber according to the process condition. The process condition includes a unit etching time over which the plasma etching process is to be continuously performed.

    Semiconductor package and method of fabricating the same

    公开(公告)号:US11335668B2

    公开(公告)日:2022-05-17

    申请号:US16896897

    申请日:2020-06-09

    Abstract: The present disclosure relates to a semiconductor package and a manufacturing method thereof. The method includes stacking semiconductor chips using a thermo-compression bonding (TCB) method, where defects are minimized for increased reliability. The semiconductor package includes an interface chip including a first test pad, a bump pad provided inside the first test pad, and a first through silicon via (TSV) provided between the first test pad and the bump pad; at least one memory chip, which is stacked on the interface chip and includes a second test pad, a dummy pad provided inside the second test pad, and a second TSV provided between the second test pad and the dummy pad; and an adhesive layer provided between the interface chip and the at least one memory chip. wherein no bump is provided on the first test pad and the second test pad.

    Method and apparatus for plasma etching

    公开(公告)号:US10096453B2

    公开(公告)日:2018-10-09

    申请号:US15133989

    申请日:2016-04-20

    Abstract: A plasma etching apparatus includes an etching chamber and at least one processor. The etching chamber is configured to support a target therein. The at least one processor is configured to: determine a process condition for plasma etching the target before execution of a plasma etching process; and control an aspect of the chamber according to the process condition. The process condition includes a unit etching time over which the plasma etching process is to be continuously performed.

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