PARALLEL COMBINED OUTPUT LINEAR AMPLIFIER AND OPERATING METHOD THEREOF
    1.
    发明申请
    PARALLEL COMBINED OUTPUT LINEAR AMPLIFIER AND OPERATING METHOD THEREOF 有权
    并联组合输出线性放大器及其工作方法

    公开(公告)号:US20160065142A1

    公开(公告)日:2016-03-03

    申请号:US14843580

    申请日:2015-09-02

    Abstract: A parallel output linear amplifier is provided that includes a transconductance amplifier configured to receive an analog input signal from an input terminal and amplify the analog input signal. The parallel output linear amplifier also includes a first pre-amplifier connected to the transconductance amplifier and operated using a floating drive voltage, and a cascode class AB amplifier connected to the first pre-amplifier and configured to provide an amplified signal to an output terminal. The parallel output linear amplifier further includes a second pre-amplifier configured connected to the transconductance amplifier and operated using the floating drive voltage, and a cascade class AB amplifier connected to the second pre-amplifier and configured to provide an amplified signal to the output terminal.

    Abstract translation: 提供并行输出线性放大器,其包括跨导放大器,其被配置为从输入端子接收模拟输入信号并放大模拟输入信号。 并联输出线性放大器还包括连接到跨导放大器的第一前置放大器并使用浮动驱动电压进行操作,以及连接到第一前置放大器并被配置为向输出端子提供放大信号的共源共栅AB类放大器。 并行输出线性放大器还包括配置为连接到跨导放大器并使用浮动驱动电压进行操作的第二前置放大器,以及连接到第二前置放大器并被配置为向输出端子提供放大信号的级联AB类放大器 。

    ANTENNA MODULE AND RADIO FREQUENCY APPARATUS INCLUDING THE SAME

    公开(公告)号:US20230024260A1

    公开(公告)日:2023-01-26

    申请号:US17958813

    申请日:2022-10-03

    Abstract: A radio frequency (RF) apparatus includes a radio frequency integrated circuit (RFIC) chip and an antenna module disposed on an upper surface of the RFIC chip. The antenna module includes a first antenna patch that is in parallel with the RFIC chip, the first antenna patch including a first penetration point, and a first power feed point connected to a first power feed line to transmit and receive a first RF signal of a first frequency band; and a second antenna patch disposed above the first antenna patch in parallel with the first antenna patch, the second antenna patch including a second power feed point connected to a second power feed line that penetrates through the first penetration point to transmit and receive a second RF signal of a second frequency band. The first penetration point is formed in a first region of the first antenna patch in which influence on an electric field generated by the first antenna patch via the first power feed point is minimized.

    METHOD FOR SYNTHESIZING FREQUENCY AND ELECTRONIC DEVICE THEREOF
    4.
    发明申请
    METHOD FOR SYNTHESIZING FREQUENCY AND ELECTRONIC DEVICE THEREOF 有权
    用于合成其频率和电子装置的方法

    公开(公告)号:US20140300390A1

    公开(公告)日:2014-10-09

    申请号:US14244206

    申请日:2014-04-03

    CPC classification number: H03L7/104 H03L7/1976 H03L2207/05

    Abstract: An electronic device for synthesizing a frequency is provided. The electronic device includes a bank changer configured to output a channel code corresponding to a reference frequency signal and a feedback frequency signal, a channel code mapper configured to generate a changed channel code by applying an offset to the channel code output from the bank changer, and a voltage controlled oscillator configured to control a total capacitance of a plurality of capacitors based on the changed channel code and to oscillate a frequency dependent on the total capacitance.

    Abstract translation: 提供一种用于合成频率的电子装置。 电子设备包括:银行变换器,被配置为输出与参考频率信号和反馈频率信号相对应的信道码;频道码映射器,被配置为通过对从银行变换器输出的信道码施加偏移来产生改变的信道码; 以及电压控制振荡器,其被配置为基于改变的信道码来控制多个电容器的总电容,并且根据总电容振荡频率。

    MULTI-FED PATCH ANTENNAS AND DEVICES INCLUDING THE SAME

    公开(公告)号:US20190214703A1

    公开(公告)日:2019-07-11

    申请号:US16181543

    申请日:2018-11-06

    Abstract: A radio frequency (RF) device may include a radio frequency integrated circuit (RFIC) chip and an antenna module on an upper surface of the RFIC chip. The antenna module may include a first patch parallel to the RFIC chip and having an upper surface configured to emit radiation in a vertical direction opposite the first patch from the RFIC chip, a ground plate parallel to the first patch, and between the first patch and the RFIC chip, and a first plurality of feed lines connected to a lower surface of the first patch and configured to supply at least one first differential signal to the first patch from the RFIC chip.

    TRANSMITTER AND METHOD USING CARRIER AGGREGATION
    6.
    发明申请
    TRANSMITTER AND METHOD USING CARRIER AGGREGATION 审中-公开
    发射机和使用载波聚合的方法

    公开(公告)号:US20160309535A1

    公开(公告)日:2016-10-20

    申请号:US15131572

    申请日:2016-04-18

    CPC classification number: H04W72/0453 H04B1/005 H04L5/001 H04L5/0098

    Abstract: Disclosed are a transmitter and method of combining multiple contiguous and non-contiguous frequency bands in a wireless communication system using carrier aggregation. The transmitter includes a first communication unit for converting a first baseband signal into a first RF signal of a first band, a second communication unit for converting a second baseband signal into a second RF signal of a second band, a combiner for outputting a third RF signal by combining the first RF signal and the second RF signal, and an amplifier for amplifying the third RF signal.

    Abstract translation: 公开了一种在使用载波聚合的无线通信系统中组合多个连续和不连续频带的发射机和方法。 发射机包括用于将第一基带信号转换为第一频带的第一RF信号的第一通信单元,用于将第二基带信号转换成第二频带的第二RF信号的第二通信单元,用于输出第三RF的组合器 通过组合第一RF信号和第二RF信号的信号,以及用于放大第三RF信号的放大器。

    METHOD OF TESTING RF INTEGRATED CIRCUIT
    7.
    发明申请

    公开(公告)号:US20190319717A1

    公开(公告)日:2019-10-17

    申请号:US16356088

    申请日:2019-03-18

    Abstract: A method of testing a radio frequency (RF) integrated circuit includes: forming, performed by the RF integrated circuit, a test loop that passes through a first transceiver circuit, a first front-end circuit, and a second transceiver circuit, based on a test control signal transmitted from a test device; adjusting, performed by the RF integrated circuit, a shift degree of at least one phase shifter in the first front-end circuit, based on the test control circuit; and receiving, performed by the RF integrated circuit, a test input signal via the first transceiver circuit from the test device, and outputting, to the test device, the test input signal that has passed through the test loop, wherein the test input signal is output as a test output signal via the second transceiver circuit.

    DIGITAL-ANALOG CONVERSION METHOD AND DEVICE

    公开(公告)号:US20170201263A1

    公开(公告)日:2017-07-13

    申请号:US15315549

    申请日:2015-06-02

    CPC classification number: H03M1/0604 H03M1/66

    Abstract: The present invention relates to a digital-analog conversion method and device for adjusting a reference current to be used in a digital-analog conversion, by using a common mode feedback device, and the digital-analog conversion method of the present invention comprises the steps of: generating a reference current by receiving a reference voltage; converting a digital signal into an analog signal by receiving the generated reference current; detecting a common mode voltage, which is the average value of a both-end voltage of the converted analog signal; comparing the detected common mode voltage with the reference voltage; generating a feedback signal on the basis of the comparison result; and adjusting the reference current according to the generated feedback signal.

    HYBRID CHIP COMPRISING HYBRID CONNECTOR
    9.
    发明申请
    HYBRID CHIP COMPRISING HYBRID CONNECTOR 有权
    包含混合连接器的混合芯片

    公开(公告)号:US20170026041A1

    公开(公告)日:2017-01-26

    申请号:US15211459

    申请日:2016-07-15

    CPC classification number: H03K19/017509 H01L27/0248

    Abstract: An integrated circuit (IC), a method of testing the IC, and a method of manufacturing the IC are provided. The IC includes analog circuitry, digital circuitry, at least one first connector, and a switching unit operatively coupled with the at least one first connector and configured to, if a first signal is received, couple the analog circuitry and the at least one first connector, and, if a second signal is received, couple the digital circuitry and the at least one first connector.

    Abstract translation: 提供集成电路(IC),IC的测试方法以及IC的制造方法。 所述IC包括模拟电路,数字电路,至少一个第一连接器以及与所述至少一个第一连接器可操作耦合的开关单元,并且被配置为如果接收到第一信号则将所述模拟电路和所述至少一个第一连接器 并且如果接收到第二信号,则耦合数字电路和至少一个第一连接器。

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