公开(公告)号：US20230135089A1

公开(公告)日：2023-05-04

申请号：US17852853

申请日：2022-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hansol YOO ,  Wonkeun KIM

IPC: H01L21/56 ,  B32B7/06 ,  B32B27/30 ,  B32B5/02 ,  B32B27/12 ,  B29C33/68

Abstract: A release film may include a conductive polymer substrate layer, and release layers provided on a top surface and a bottom surface of the conductive polymer substrate layer. Each of the release layers may include a fluorine-based polymer, and a density of the conductive polymer substrate layer ranges from 0.1 g/cm3 to 0.5 g/cm3.

公开(公告)号：US20240297150A1

公开(公告)日：2024-09-05

申请号：US18500311

申请日：2023-11-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongpa HONG ,  Yeongkwon KO ,  Gunho CHANG ,  Wonkeun KIM ,  Wonyoung KIM

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L23/3107 ,  H01L24/09 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0903 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32059 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1441

Abstract: A semiconductor package includes a base chip, a first semiconductor chip on the base chip, the first semiconductor chip including first through-vias, first bump structures on the first front surface of the first semiconductor chip, a plurality of second semiconductor chips sequentially stacked on the first semiconductor chip, the plurality of second semiconductor chips including second through-vias, adhesive layers respectively on the second front surfaces of the plurality of second semiconductor chips, and an encapsulant between the base chip and the first semiconductor chip, the encapsulant covering at least a portion of each of the first semiconductor chip and the plurality of second semiconductor chips. The adhesive layers respectively have a width equal to or less than a width of the first semiconductor chip and a width of each of the plurality of second semiconductor chips in a direction, parallel to the upper surface of the base chip.

公开(公告)号：US20150069635A1

公开(公告)日：2015-03-12

申请号：US14463650

申请日：2014-08-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wonkeun KIM ,  In-Young LEE ,  Chang-Seong JEON ,  Taeje CHO

IPC: H01L25/10 ,  H01L23/34 ,  H01L21/56 ,  H01L23/367 ,  H01L23/31 ,  H01L25/00 ,  H01L23/373

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L23/345 ,  H01L23/36 ,  H01L23/3677 ,  H01L24/19 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/181 ,  H01L2924/00

Abstract: Provided are semiconductor packages and methods of fabricating the same. The method may include mounting a first semiconductor chip including chip and heat-transfer regions and a lower heat-transfer pattern disposed on the heat-transfer region, on a substrate, mounting a second semiconductor chip on the chip region of the first semiconductor chip, forming a mold layer on the substrate to enclose the first and second semiconductor chips, forming an opening in the mold layer to expose at least a portion of the lower heat-transfer pattern, forming a heat-pathway pattern in the opening, and forming a heat-dissipating part on the second semiconductor chip and the mold layer to be connected to the heat-pathway pattern.

Abstract translation: 提供半导体封装及其制造方法。 该方法可以包括在基板上安装包括芯片和传热区域的第一半导体芯片和设置在传热区域上的较低传热图案，将第二半导体芯片安装在第一半导体芯片的芯片区域上， 在所述基板上形成模具层以包围所述第一和第二半导体芯片，在所述模具层中形成开口以露出所述下部传热图案的至少一部分，以在所述开口中形成热通路图案，并且形成 第二半导体芯片上的散热部件和要连接到热通路图案的模具层。

公开(公告)号：US20230086253A1

公开(公告)日：2023-03-23

申请号：US17740649

申请日：2022-05-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seonho LEE ,  Wonkeun KIM ,  Myoungchul EUM

IPC: H01L21/683 ,  H01L23/00 ,  H01L21/82 ,  C08L75/04 ,  C09J133/08 ,  C08L29/04 ,  C08L39/06

Abstract: A method includes preparing a protective film including a base film and a protective layer laminated on a surface of the base film, mounting the protective film on a semiconductor wafer having a rear surface attached to a dicing tape and a front surface positioned opposite to the rear surface, the protective layer being disposed on the front surface, irradiating the rear surface of the semiconductor wafer with a dicing laser, removing the base film of the protective film from the semiconductor wafer, dividing the semiconductor wafer into individual semiconductor chips, and removing the protective layer from the individual semiconductor chips.

公开(公告)号：US20220020664A1

公开(公告)日：2022-01-20

申请号：US17376600

申请日：2021-07-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joungphil LEE ,  Wonkeun KIM ,  Mihyae PARK

IPC: H01L23/373 ,  H01L23/367 ,  H01L23/31 ,  H01L23/552 ,  H01L25/065 ,  H01L25/10

Abstract: A semiconductor package includes at least one semiconductor device mounted on a first substrate, a thermosetting resin layer on the at least one semiconductor device, the thermosetting resin layer including an irreversible thermochromic pigment, a metal plate on the thermosetting resin layer, and a molding member surrounding the at least one semiconductor device at least in a lateral direction and being in contact with the thermosetting resin layer.