公开(公告)号：US20140273441A1

公开(公告)日：2014-09-18

申请号：US13841037

申请日：2013-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae-Soo Kim ,  Yong-Min Cho

IPC: H01L21/308 ,  H01L21/283

CPC classification number: H01L21/283 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/76816 ,  H01L23/5223 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: To fabricate patterns of a semiconductor device, a mask film is formed on a substrate. A plurality of first patterns and a plurality of second patterns are formed on the mask film. The plurality of first patterns is spaced apart from each other at a first distance. The plurality of second patterns is spaced apart from each other at a second distance. The second distance is different from the first distance. A spacer film is conformally formed on the plurality of first patterns and the plurality of second patterns to a predetermined thickness. The spacer film fills spaces between the plurality of second patterns. A part of the spacer film is partially removed to form a plurality of spacer film patterns are formed on side walls of the plurality of the first patterns. The plurality of first patterns and the plurality of second patterns are removed. A plurality of patterns is formed on the substrate using the plurality of spacer film as a mask.

Abstract translation: 为了制造半导体器件的图案，在衬底上形成掩模膜。 在掩模膜上形成多个第一图案和多个第二图案。 多个第一图案在第一距离处彼此间隔开。 多个第二图案在第二距离处彼此间隔开。 第二距离与第一距离不同。 间隔膜在多个第一图案和多个第二图案上共形地形成为预定厚度。 间隔膜填充多个第二图案之间的空间。 间隔膜的一部分被部分地去除以形成多个间隔膜图案，形成在多个第一图案的侧壁上。 去除多个第一图案和多个第二图案。 使用多个间隔膜作为掩模在基板上形成多个图案。

公开(公告)号：US09570434B2

公开(公告)日：2017-02-14

申请号：US15217531

申请日：2016-07-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Jae Kang ,  Jin-Wook Lee ,  Kang-Ill Seo ,  Yong-Min Cho

IPC: H01L27/088 ,  H01L27/02 ,  H01L23/522 ,  H01L21/768 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  G03F7/70 ,  H01L21/0274 ,  H01L21/32136 ,  H01L21/32139 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53271 ,  H01L27/0207

Abstract: Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first direction, to be spaced apart in a second direction intersecting the first direction, forming first and second gate lines, each extending in the second direction, on the first to fourth fins to be spaced apart in the first direction, forming a first contact on the first gate line between the first and second fins, forming a second contact on the first gate line between the third and fourth fins, forming a third contact on the second gate line between the first and second fins, forming a fourth contact on the second gate line between the third and fourth fins and forming a fifth contact on the first to fourth contacts so as to overlap with the second contact and the third contact and so as not to overlap with the first contact and the fourth contact, wherein the fifth contact is arranged to diagonally traverse a quadrangle defined by the first to fourth contacts.

Abstract translation: 提供一种半导体器件及其制造方法。 制造方法包括：形成第一至第四鳍片，每个翼片沿第一方向延伸，沿与第一方向相交的第二方向间隔开，形成第一和第二栅极线，每个沿第二方向延伸，第一至第四鳍片 在第一方向上间隔开，在第一和第二鳍之间的第一栅极线上形成第一接触，在第三和第四鳍之间的第一栅极线上形成第二接触，在第二栅极线上形成第三接触 在第一和第二散热片之间，在第三和第四鳍之间的第二栅极线上形成第四触点，并在第一至第四触点上形成第五触点，以便与第二触点和第三触点重叠， 与第一触点和第四触点重叠，其中第五触点布置成对角地横过由第一至第四触点限定的四边形。

公开(公告)号：US09093378B2

公开(公告)日：2015-07-28

申请号：US13841037

申请日：2013-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae-Soo Kim ,  Yong-Min Cho

IPC: H01L21/308 ,  H01L21/283 ,  H01L21/033 ,  H01L21/311 ,  H01L23/522 ,  H01L49/02

CPC classification number: H01L21/283 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/76816 ,  H01L23/5223 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: To fabricate patterns of a semiconductor device, a mask film is formed on a substrate. A plurality of first patterns and a plurality of second patterns are formed on the mask film. The plurality of first patterns is spaced apart from each other at a first distance. The plurality of second patterns is spaced apart from each other at a second distance. The second distance is different from the first distance. A spacer film is conformally formed on the plurality of first patterns and the plurality of second patterns to a predetermined thickness. The spacer film fills spaces between the plurality of second patterns. A part of the spacer film is partially removed to form a plurality of spacer film patterns are formed on side walls of the plurality of the first patterns. The plurality of first patterns and the plurality of second patterns are removed. A plurality of patterns is formed on the substrate using the plurality of spacer film as a mask.

Abstract translation: 为了制造半导体器件的图案，在衬底上形成掩模膜。 在掩模膜上形成多个第一图案和多个第二图案。 多个第一图案在第一距离处彼此间隔开。 多个第二图案在第二距离处彼此间隔开。 第二距离与第一距离不同。 间隔膜在多个第一图案和多个第二图案上共形地形成为预定厚度。 间隔膜填充多个第二图案之间的空间。 间隔膜的一部分被部分地去除以形成多个间隔膜图案，形成在多个第一图案的侧壁上。 去除多个第一图案和多个第二图案。 使用多个间隔膜作为掩模在基板上形成多个图案。

公开(公告)号：USRE49525E1

公开(公告)日：2023-05-09

申请号：US16986448

申请日：2020-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Il Bae ,  Bomsoo Kim ,  Yong-Min Cho

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/423 ,  H01L29/417 ,  H01L29/06 ,  H01L29/78 ,  H01L29/45 ,  H01L21/308 ,  H01L29/775 ,  B82Y10/00 ,  H01L27/11 ,  H01L29/165

CPC classification number: H01L29/6656 ,  B82Y10/00 ,  H01L21/308 ,  H01L29/0673 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/45 ,  H01L29/66439 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785 ,  H01L29/7848 ,  H01L29/78696 ,  H01L27/1104 ,  H01L29/165

Abstract: An semiconductor device is provided. A fin is disposed on a substrate, extending in a lengthwise direction. A first recess is disposed on a sidewall of the fin so that the fin and the first recess is arranged in a straight line along the lengthwise direction. A gate structure crosses the fin in the first direction crossing the lengthwise direction. A spacer is disposed on sidewalk of the gate structure. A source/drain region is disposed in the first recess. The source/drain region is formed under the spacer. A silicide layer is disposed on the source/drain region. The silicide layer and the source/drain region fill the first recess.

公开(公告)号：US09773869B2

公开(公告)日：2017-09-26

申请号：US14206373

申请日：2014-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-Min Cho ,  Hyun-Jae Kang ,  Dong-Il Bae

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L29/165

CPC classification number: H01L29/0847 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device is provided. A substrate includes a fin. The fin extends in a first direction. A gate structure is disposed on a first region of the fin. The gate structure extends in a second direction crossing the first direction. A source/drain is disposed on a second region of the fin. The first source/drain is disposed on at least one sidewall of the gate structure. A top surface of the first region is lower than a top surface of the second region.

公开(公告)号：US09991259B2

公开(公告)日：2018-06-05

申请号：US15387022

申请日：2016-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Jae Kang ,  Jin-Wook Lee ,  Kang-Ill Seo ,  Yong-Min Cho

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/3213 ,  H01L21/027 ,  H01L21/768 ,  H01L23/522 ,  H01L27/02 ,  H01L23/528 ,  H01L23/532 ,  G03F7/20

CPC classification number: H01L27/0886 ,  G03F7/70 ,  H01L21/0274 ,  H01L21/32136 ,  H01L21/32139 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53271 ,  H01L27/0207

Abstract: Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first direction, to be spaced apart in a second direction intersecting the first direction, forming first and second gate lines, each extending in the second direction, on the first to fourth fins to be spaced apart in the first direction, forming a first contact on the first gate line between the first and second fins, forming a second contact on the first gate line between the third and fourth fins, forming a third contact on the second gate line between the first and second fins, forming a fourth contact on the second gate line between the third and fourth fins and forming a fifth contact on the first to fourth contacts so as to overlap with the second contact and the third contact and so as not to overlap with the first contact and the fourth contact, wherein the fifth contact is arranged to diagonally traverse a quadrangle defined by the first to fourth contacts.

公开(公告)号：US09525036B2

公开(公告)日：2016-12-20

申请号：US14662697

申请日：2015-03-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Il Bae ,  Bomsoo Kim ,  Yong-Min Cho

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/45 ,  H01L29/08 ,  H01L21/308

CPC classification number: H01L29/41791 ,  H01L21/308 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

Abstract: An semiconductor device is provided. A fin is disposed on a substrate, extending in a lengthwise direction. A first recess is disposed on a sidewall of the fin so that the fin and the first recess is arranged in a straight line along the lengthwise direction. A gate structure crosses the fin in the first direction crossing the lengthwise direction. A spacer is disposed on sidewalk of the gate structure. A source/drain region is disposed in the first recess. The source/drain region is formed under the spacer. A silicide layer is disposed on the source/drain region. The silicide layer and the source/drain region fill the first recess.

Abstract translation: 提供半导体器件。 翅片设置在基板上，沿长度方向延伸。 第一凹部设置在翅片的侧壁上，使得翅片和第一凹部沿着长度方向布置成直线。 栅极结构在与长度方向交叉的第一方向上跨越翅片。 间隔件设置在门结构的人行道上。 源极/漏极区域设置在第一凹部中。 源极/漏极区形成在间隔物下方。 硅化物层设置在源极/漏极区域上。 硅化物层和源/漏区填充第一凹槽。

公开(公告)号：US09418896B2

公开(公告)日：2016-08-16

申请号：US14539579

申请日：2014-11-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Jae Kang ,  Jin-Wook Lee ,  Kang-Ill Seo ,  Yong-Min Cho

IPC: H01L21/336 ,  H01L21/8234 ,  H01L21/3213

CPC classification number: H01L27/0886 ,  G03F7/70 ,  H01L21/0274 ,  H01L21/32136 ,  H01L21/32139 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53271 ,  H01L27/0207

Abstract: Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first direction, to be spaced apart in a second direction intersecting the first direction, forming first and second gate lines, each extending in the second direction, on the first to fourth fins to be spaced apart in the first direction, forming a first contact on the first gate line between the first and second fins, forming a second contact on the first gate line between the third and fourth fins, forming a third contact on the second gate line between the first and second fins, forming a fourth contact on the second gate line between the third and fourth fins and forming a fifth contact on the first to fourth contacts so as to overlap with the second contact and the third contact and so as not to overlap with the first contact and the fourth contact, wherein the fifth contact is arranged to diagonally traverse a quadrangle defined by the first to fourth contacts.

Abstract translation: 提供一种半导体器件及其制造方法。 制造方法包括：形成第一至第四鳍片，每个翼片沿第一方向延伸，沿与第一方向相交的第二方向间隔开，形成第一和第二栅极线，每个沿第二方向延伸，第一至第四鳍片 在所述第一方向上间隔开，在所述第一和第二鳍之间的所述第一栅极线上形成第一接触，在所述第三和第四鳍之间的所述第一栅极线上形成第二接触，在所述第二栅极线上形成第三接触 在第一和第二散热片之间，在第三和第四鳍之间的第二栅极线上形成第四触点，并在第一至第四触点上形成第五触点，以便与第二触点和第三触点重叠， 与第一触点和第四触点重叠，其中第五触点布置成对角地横过由第一至第四触点限定的四边形。