-
公开(公告)号：US11768618B2
公开(公告)日：2023-09-26
申请号：US17468107
申请日：2021-09-07
发明人： Young Jin Cho , Hyo Deok Shin , Kyung Bo Yang , Youn Ho Jeon , Hyeok Jun Choe , Jung Hyun Hong , Soon Suk Hwang
IPC分类号： G06F3/06
CPC分类号： G06F3/064 , G06F3/061 , G06F3/0608 , G06F3/0616 , G06F3/0644 , G06F3/0656 , G06F3/0679
摘要： A data storage device is provided. The data storage device includes: a first function block of a device controller configured to receive user data and perform a first data processing; a first buffer memory connected to the first function block and configured to store user data subjected to the first data processing as first process data; a second function block of the device controller configured to receive a data write command determined based on the first process data; and a non-volatile memory connected to the second function block, and configured to receive and store data stored in the first buffer memory. The user data is provided to the first function block before the data write command is provided to the second function block.
-
2.发明申请公开(公告)号：US20180075889A1
公开(公告)日：2018-03-15
申请号：US15811940
申请日：2017-11-14
发明人： Kyo Min Sohn , Dong Su Lee , Young Jin Cho , Hyung Woo Choi
IPC分类号： G11C8/00 , G06F13/16 , G11C8/10 , G11C11/406
CPC分类号： G11C8/00 , G06F13/1668 , G11C8/10 , G11C11/40611
摘要： A memory cell array may include a normal cell array and a spare cell array, the normal cell array having a plurality of normal memory cells connected to normal lines and the spare memory cell array having a plurality of spare memory cells connected to spare lines configured to replace a failed normal memory cell with a spare memory cell. A spare line address encoding circuit may be configured to generate a spare line address which encodes spare line enable signals being applied when a spare line replacing a normal line is activated to indicate a physical location of the spare line being activated. A spare line adjacent address generator may be configured to generate spare line adjacent address based on the spare line address, and to activate spare lines physically adjacent to the activated spare line.
-
公开(公告)号：US09523171B2
公开(公告)日：2016-12-20
申请号：US14163347
申请日：2014-01-24
发明人： Young Jin Cho , Doo Young Ryu , Won Young Jung , Jeong Hoon Kang
CPC分类号： D06F37/225 , D06F37/22 , D06F37/245
摘要： A washing machine having a balancer to offset unbalanced load generated during rotation of a drum. The washing machine includes a cabinet, a drum rotatably disposed in the cabinet, and a balancer mounted to the drum to offset unbalanced load generated in the drum during rotation of the drum. The balancer includes a balancer housing having an annular channel defined therein, at least one mass movably disposed in the channel, a magnet provided at one side of the balancer housing to restrain the mass, and a magnet case to receive the magnet.
摘要翻译： 一种具有平衡器以抵消在滚筒旋转期间产生的不平衡负载的洗衣机。 洗衣机包括机壳，可旋转地设置在机壳中的滚筒和安装到滚筒上的平衡器，以抵消在滚筒旋转期间在滚筒中产生的不平衡载荷。 平衡器包括平衡器壳体，其具有限定在其中的环形通道，至少一个可移动地设置在通道中的质量块，设置在平衡器壳体的一侧以限制质量的磁体和磁体壳体以容纳磁体。
-
4.发明授权公开(公告)号：US11817174B2
公开(公告)日：2023-11-14
申请号：US17308221
申请日：2021-05-05
发明人： Kyo Min Sohn , Dong Su Lee , Young Jin Cho , Hyung Woo Choi
IPC分类号： G11C8/10 , G11C11/406 , G11C8/00 , G06F13/16
CPC分类号： G11C8/00 , G06F13/1668 , G11C8/10 , G11C11/40611
摘要： A spatial disturbance that occurs when an access is concentrated in a specific memory area in a volatile semiconductor memory like DRAM is properly solved by a memory controller. The memory controller includes a concentration access detection part generating a concentration access detection signal when an address for accessing a specific memory area among memory areas of volatile semiconductor memory is concentratedly received. In the case that the concentration access detection signal is generated, the memory controller includes a controller for easing or preventing corruption of data which memory cells of the specific memory area and/or memory cells of memory areas adjacent to the specific memory area hold.
-
公开(公告)号：US20210405875A1
公开(公告)日：2021-12-30
申请号：US17468107
申请日：2021-09-07
发明人： Young Jin Cho , Hyo Deok Shin , Kyung Bo Yang , Youn Ho Jeon , Hyeok Jun Choe , Jung Hyun Hong , Soon Suk Hwang
IPC分类号： G06F3/06
摘要： A data storage device is provided. The data storage device includes: a first function block of a device controller configured to receive user data and perform a first data processing; a first buffer memory connected to the first function block and configured to store user data subjected to the first data processing as first process data; a second function block of the device controller configured to receive a data write command determined based on the first process data; and a non-volatile memory connected to the second function block, and configured to receive and store data stored in the first buffer memory. The user data is provided to the first function block before the data write command is provided to the second function block.
-
公开(公告)号：US10036111B2
公开(公告)日：2018-07-31
申请号：US14163373
申请日：2014-01-24
发明人： Doo Young Ryu , Won Young Jung , Young Jin Cho , Jeong Hoon Kang
CPC分类号： D06F37/225 , D06F37/22 , D06F37/245 , D06F2222/00
摘要： A balancer includes a balancer housing coupled to a drum of a washing machine, the balancer housing having an annular channel defined therein, at least one mass movably disposed in the channel, at least one magnet to restrain movement of the mass along the channel when rotational speed of the drum is within a predetermined range, and at least one magnet fixing member coupled to an outside of the balancer housing to receive and fix the magnet.
-
公开(公告)号：US09753849B2
公开(公告)日：2017-09-05
申请号：US14792727
申请日：2015-07-07
发明人： Kui Yon Mun , Young Jin Cho , Young Kwang Yoo
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F12/02 , G11C29/56 , G06F9/44 , G06F12/14 , G06F9/445
CPC分类号： G06F12/0246 , G06F9/4401 , G06F9/445 , G06F12/14 , G06F12/1425 , G11C29/56008
摘要： A method for manufacturing a memory device includes detecting, with a tester, whether memory cells included in a memory device are defective, and programming, with the tester, start addresses of defect-free memory regions for addressing modes of the memory device based on a result of the detection.
-
公开(公告)号：US20170146286A1
公开(公告)日：2017-05-25
申请号：US15360953
申请日：2016-11-23
发明人： Jae Wook Moon , Young Jin Cho , Dong Hyun Chun
CPC分类号： F25D25/025 , A47B2210/175 , F25D23/067
摘要： Disclosed herein are a refrigerator capable of reducing a manufacturing cost by reducing the number of members constituting a sliding apparatus to simplify the sliding apparatus. A refrigerator includes a main body, a storage chamber provided in the inside of the main body, wherein the front part of the storage chamber opens, a storage box accommodated in the storage chamber, and including side surfaces and a bottom surface, a guide rail coupled with the storage box, and configured to guide the storage box to be slidingly pushed into and pulled from the storage chamber and a closing apparatus configured to accumulate an elastic force when the storage box is pulled, and to transfer, when the storage box is pushed, the accumulated elastic force, thereby assisting the pushing of the storage box, wherein the closing apparatus is directly coupled with the bottom surface of the storage box.
-
9.发明授权公开(公告)号：US11024352B2
公开(公告)日：2021-06-01
申请号：US13840723
申请日：2013-03-15
发明人： Kyo Min Sohn , Dong Su Lee , Young Jin Cho , Hyung Woo Choi
IPC分类号： G06F13/16 , G11C8/00 , G11C8/10 , G11C11/406
摘要： A spatial disturbance that occurs when an access is concentrated in a specific memory area in a volatile semiconductor memory like DRAM is properly solved by a memory controller. The memory controller includes a concentration access detection part generating a concentration access detection signal when an address for accessing a specific memory area among memory areas of volatile semiconductor memory is concentratedly received. In the case that the concentration access detection signal is generated, the memory controller includes a controller for easing or preventing corruption of data which memory cells of the specific memory area and/or memory cells of memory areas adjacent to the specific memory area hold.
-
公开(公告)号：US10403332B2
公开(公告)日：2019-09-03
申请号：US15792973
申请日：2017-10-25
发明人： Young Geun Lee , Young Jin Cho , Hee Hyun Nam , Hyo Deok Shin , Young Kwang Yoo
摘要： Provided are a memory device and a memory system including the same. The memory device may include a first memory rank including at least one first memory chip, a memory controller configured to provide a command to the first memory rank, at least one data buffer configured to buffer data input to the at least one first memory chip or being output from the at least one first memory chip, and a second memory rank connected to the first memory rank and comprising at least one second memory chip. The first memory rank may provide training data and a data strobe signal to the second memory rank based on a data training command from the memory controller without the training data and the data strobe signal passing through the data buffer. The second memory rank may determine a delay of the data strobe signal based on the training data being detected by the second memory rank.
-
-
-
-
-
-
-
-
-
搜索结果
21 条记录 (耗时 0.018 秒)
