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公开(公告)号：US20200208279A1
公开(公告)日：2020-07-02
申请号：US16545927
申请日：2019-08-20
发明人： Taejin Park , Jinbum Kim , Hyoungsub Kim
摘要： Disclosed herein are devices for hydrogen production and methods of fabricating hydrogen catalyst layers. The method may comprise forming on a substrate a first horizontal crystal and a first standing crystal that include each molybdenum oxide; forming a second horizontal crystal, a second standing crystal, and a preliminary layer on the second horizontal and standing crystals by supplying a sulfur gas onto the first horizontal crystal and the first standing crystal, the preliminary layer including molybdenum disulfide (MoS2); and removing the second horizontal crystal and the second standing crystal.
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公开(公告)号：US20240321991A1
公开(公告)日：2024-09-26
申请号：US18503019
申请日：2023-11-06
发明人： Ingeon Hwang , Jinbum Kim , Hyojin Kim , Sangmoon Lee , Yongjun Nam , Taehyung Lee
IPC分类号： H01L29/423 , H01L27/088 , H01L29/06 , H01L29/08 , H01L29/66 , H01L29/775 , H01L29/786
CPC分类号： H01L29/42392 , H01L27/088 , H01L29/0673 , H01L29/0847 , H01L29/66439 , H01L29/66545 , H01L29/775 , H01L29/78696
摘要： An integrated circuit device includes a fin-type active region on a substrate, a nanosheet on a fin top surface of the fin-type active region, the nanosheet being apart from the fin top surface of the fin-type active region in a vertical direction, a gate line surrounding the nanosheet on the fin-type active region, and a source/drain region on the fin-type active region, the source/drain region being in contact with the nanosheet, wherein the nanosheet includes a multilayered sheet comprising a first outer semiconductor sheet, a core semiconductor sheet, and a second outer semiconductor sheet, which are sequentially stacked in the vertical direction.
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公开(公告)号：US12046682B2
公开(公告)日：2024-07-23
申请号：US17689322
申请日：2022-03-08
发明人： Ingyu Jang , Jinbum Kim , Dahye Kim , Sujin Jung , Dongsuk Shin
IPC分类号： H01L29/78 , H01L21/02 , H01L21/764 , H01L21/8234 , H01L27/088 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/786
CPC分类号： H01L29/78696 , H01L21/0259 , H01L21/764 , H01L21/823412 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L27/0886 , H01L29/0649 , H01L29/0665 , H01L29/42392 , H01L29/66545 , H01L29/66742 , H01L29/78618
摘要： An integrated circuit (IC) device includes a fin-type active region on a substrate. A mesa-type channel region protrudes from the fin-type active region in a vertical direction. The mesa-type channel region is integrally connected with the fin-type active region. A gate line substantially surrounds a mesa-type channel region on the fin-type active region. A gate dielectric film is between the mesa-type channel region and the gate line. The mesa-type channel region includes: a plurality of round convex portions, which are convex toward the gate line; a concavo-convex sidewall, which includes a portion of each of the plurality of round convex portions and faces the gate line; and at least one void, which is inside the mesa-type channel region.
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公开(公告)号：US20230411458A1
公开(公告)日：2023-12-21
申请号：US18239660
申请日：2023-08-29
发明人： Ilgyou Shin , Minyi Kim , Myung Gil Kang , Jinbum Kim , Seung Hun Lee , Keun Hwi Cho
IPC分类号： H01L29/15 , H01L29/78 , H01L29/417 , H01L29/10
CPC分类号： H01L29/158 , H01L29/1033 , H01L29/41791 , H01L29/785
摘要： A semiconductor device includes; a substrate including a first region and a second region, a first active pattern extending upward from the first region, a first superlattice pattern on the first active pattern, a first active fin centrally disposed on the first active pattern, a first gate electrode disposed on the first active fin, and first source/drain patterns disposed on opposing sides of the first active fin and on the first active pattern. The first superlattice pattern includes at least one first semiconductor layer and at least one first blocker-containing layer, and the first blocker-containing layer includes at least one of oxygen, carbon, fluorine and nitrogen.
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公开(公告)号：US20230395684A1
公开(公告)日：2023-12-07
申请号：US18130070
申请日：2023-04-03
发明人： Sujin JUNG , Jinbum Kim , Dahye Kim , Ingyu Jang
IPC分类号： H01L29/423 , H01L29/06 , H01L29/786 , H01L29/775
CPC分类号： H01L29/42392 , H01L29/0673 , H01L29/78696 , H01L29/775
摘要： A semiconductor device is provided. The semiconductor device includes: an active region extending in a first direction on a substrate, a plurality of channel layers spaced apart from each other in a vertical direction, a gate structure enclosing the plurality of channel layers, respectively, and a source/drain region contacting the plurality of channel layers. The source/drain region includes a first epitaxial layer extending to contact the plurality of channel layers, and a second epitaxial layer on the first epitaxial layer. A surface in which the first epitaxial layer and the second epitaxial layer contact each other includes: first surfaces having a first slope; second surfaces having a second slope, different from the first slope; first bent portions between the first surfaces and the second surfaces; and a second bent portion in which the second surfaces meet.
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公开(公告)号：US20230361215A1
公开(公告)日：2023-11-09
申请号：US18133730
申请日：2023-04-12
发明人： Gyeom Kim , Daehong Ko , Jinbum Kim , Sangmoon Lee , Daeseop Byeon , Seran Park , Hyunsu Shin , Kiseok Lee , Chunghee Jo
CPC分类号： H01L29/7851 , H01L29/66545 , H01L29/6656
摘要： A semiconductor device including a substrate extending in a first direction and a second direction perpendicular to the first direction, a first active pattern protruding from a top surface of the substrate and extending in the first direction, an isolation pattern covering a sidewall of the first active pattern on the substrate, first silicon patterns spaced apart from each other in a third direction on the first active pattern, the third direction perpendicular to the first direction and second direction, a first source/drain layer extending in the third direction from a top surface of the first active pattern on the first active pattern, and in contact with sidewalls of the first silicon patterns, wherein a sidewall of the first source/drain layer in the second direction has a constant inclination with respect to the top surface of the substrate, and a gate structure extending in the second direction while filling a gap between the first silicon patterns on the substrate.
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7.发明授权公开(公告)号：US11417731B2
公开(公告)日：2022-08-16
申请号：US17128153
申请日：2020-12-20
发明人： Jinbum Kim , Dahye Kim , Seokhoon Kim , Jaemun Kim , Ilgyou Shin , Haejun Yu , Kyungin Choi , Kihyun Hwang , Sangmoon Lee , Seung Hun Lee , Keun Hwi Cho
IPC分类号： H01L29/08 , H01L27/092 , H01L29/165 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786 , H01L29/161 , H01L29/06 , H01L21/8238
摘要： A semiconductor device includes an active pattern on a substrate, a pair of source/drain patterns on the active pattern, a channel pattern between the pair of source/drain patterns, the channel pattern including semiconductor patterns stacked to be spaced apart from each other, and a gate electrode crossing the channel pattern and extending in a first direction. One of the pair of source/drain patterns includes a first semiconductor layer and a second semiconductor layer thereon. The first semiconductor layer is in contact with a first semiconductor pattern, which is one of the stacked semiconductor patterns. The largest widths of the first semiconductor pattern, the first semiconductor layer, and the second semiconductor layer in the first direction are a first width, a second width, a third width, respectively, and the second width is larger than the first width and smaller than the third width.
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公开(公告)号：US20220068920A1
公开(公告)日：2022-03-03
申请号：US17524128
申请日：2021-11-11
发明人： Kyungin Choi , Dahye Kim , Jaemun Kim , Jinbum Kim , Seunghun Lee
IPC分类号： H01L27/088 , H01L29/165 , H01L29/06 , H01L21/8234 , H01L21/02 , H01L29/66 , H01L21/306 , H01L21/762
摘要： Integrated circuit devices may include a fin-type active area, a semiconductor liner contacting a side wall of the fin-type active area and including a protrusion portion protruding outward from the fin-type active area in the vicinity of an edge of an upper surface of the fin-type active area, and an isolation layer spaced apart from the fin-type active area with the semiconductor liner therebetween. To manufacture the integrated circuit devices, a crystalline semiconductor layer covering the fin-type active area with a first thickness and an amorphous semiconductor layer covering the mask pattern with a second thickness may be formed, an extended crystalline semiconductor layer covering the mask pattern may be formed by crystalizing the amorphous semiconductor layer, and a semiconductor liner including a protrusion portion may be formed from the extended crystalline semiconductor layer and the crystalline semiconductor layer.
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公开(公告)号：US20240322039A1
公开(公告)日：2024-09-26
申请号：US18421001
申请日：2024-01-24
发明人： Hyojin Kim , Jinbum Kim , Sangmoon Lee , Yongjun Nam , Ingeon Hwang
IPC分类号： H01L29/78 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/786
CPC分类号： H01L29/7848 , H01L29/66439 , H01L29/66742 , H01L29/775 , H01L29/78696 , H01L29/42392
摘要： The integrated circuit device includes a fin-type active region extending in a first direction, a channel region on the fin-type active region, a gate line on the channel region and extending in a second direction, and a source/drain region on the fin-type active region and in contact with the channel region, wherein the source/drain region includes a plurality of semiconductor layers including a first semiconductor layer that includes a portion in contact with the channel region and a portion in contact with the fin-type active region, a second semiconductor layer on the first semiconductor layer, and a third semiconductor layer on the second semiconductor layer, a germanium (Ge) content ratio in the first semiconductor layer is greater than or equal to 10 at % and less than 100 at %, and the Ge content ratio in the first semiconductor layer decreases towards a boundary with the second semiconductor layer.
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公开(公告)号：US20240321885A1
公开(公告)日：2024-09-26
申请号：US18476688
申请日：2023-09-28
发明人： Jinbum Kim , Ingyu Jang , Sujin Jung , Gyeom Kim , Hyojin Kim , Yongjun Nam , Sangmoon Lee
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L27/092 , H01L21/823814 , H01L21/823871
摘要： An integrated circuit device includes a first transistor comprising a first conductivity type, which includes a first channel region and a first source/drain region, a second transistor comprising a second conductivity type, which includes a second channel region and a second source/drain region, a first contact structure that contacts the first source/drain region and comprising a first length, and the first contact structure extends from above the first source/drain region and beyond an uppermost surface of the first channel region by a first vertical distance, and a second contact structure that contacts the second source/drain region and having a second length that is greater than the first length, the second contact extends from above the second source/drain region and beyond an uppermost surface of the second channel region by a second vertical distance, which is greater than the first vertical distance.
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