公开(公告)号：US09761290B1

公开(公告)日：2017-09-12

申请号：US15247912

申请日：2016-08-25

Applicant: SanDisk Technologies LLC

Inventor： Navneeth Kankani ,  Ning Ye ,  Suresh Upadhyayula ,  Sarath Puthenthermadam ,  Deepanshu Dutta

IPC: G11C5/02 ,  G11C7/20 ,  H01L23/34 ,  H01L23/367 ,  H01L23/373 ,  H01L23/467 ,  G11C7/24

CPC classification number: G11C7/20 ,  G11C5/02 ,  G11C5/04 ,  G11C7/04 ,  G11C7/24 ,  G11C16/20 ,  G11C29/52 ,  G11C2029/0409 ,  H01L23/345 ,  H01L23/3675 ,  H01L23/3736 ,  H01L23/467 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/83805 ,  H01L2924/15311 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for preventing overheating, for annealing non-volatile memory. An apparatus may include an array of non-volatile storage elements. A heating element may be configured to heat a first set of the non-volatile storage elements to anneal the first set of non-volatile storage elements. A heat shield or cooling element may be configured to prevent a second set of the non-volatile storage elements from overheating during annealing of the first set of non-volatile storage elements, to mitigate data errors for data stored on the second set of non-volatile storage elements.

公开(公告)号：US10854573B2

公开(公告)日：2020-12-01

申请号：US16248923

申请日：2019-01-16

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhongli Ji ,  Ning Ye ,  Tong Zhang ,  Hem Takiar ,  Yangming Liu

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/31 ,  H01L27/11582 ,  H01L21/306 ,  H01L21/822 ,  H01L21/768 ,  H01L27/1157

Abstract: A substrate semiconductor layer is attached to a carrier substrate through a sacrificial bonding material layer. A plurality of semiconductor dies included within continuous material layers are formed on a front side of the substrate semiconductor layer. Each of the continuous material layers continuously extends over areas of the plurality of semiconductor dies. A plurality of dicing channels is formed between neighboring pairs among the plurality of semiconductor dies by anisotropically etching portions of the continuous material layers located between neighboring pairs of semiconductor dies. The plurality of dicing channels extends to a top surface of the sacrificial bonding material layer. The sacrificial bonding material layer is removed selective to materials of surface portions of the plurality of semiconductor dies using an isotropic etch process. The plurality of semiconductor dies is singulated from one another upon removal of the sacrificial bonding material layer.

公开(公告)号：US20200219842A1

公开(公告)日：2020-07-09

申请号：US16248923

申请日：2019-01-16

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhongli Ji ,  Ning Ye ,  Tong Zhang ,  Hem Takiar ,  Yangming Liu

IPC: H01L23/00 ,  H01L23/31 ,  H01L27/11582 ,  H01L27/1157 ,  H01L21/822 ,  H01L21/768 ,  H01L21/306

Abstract: A substrate semiconductor layer is attached to a carrier substrate through a sacrificial bonding material layer. A plurality of semiconductor dies included within continuous material layers are formed on a front side of the substrate semiconductor layer. Each of the continuous material layers continuously extends over areas of the plurality of semiconductor dies. A plurality of dicing channels is formed between neighboring pairs among the plurality of semiconductor dies by anisotropically etching portions of the continuous material layers located between neighboring pairs of semiconductor dies. The plurality of dicing channels extends to a top surface of the sacrificial bonding material layer. The sacrificial bonding material layer is removed selective to materials of surface portions of the plurality of semiconductor dies using an isotropic etch process. The plurality of semiconductor dies is singulated from one another upon removal of the sacrificial bonding material layer.

公开(公告)号：US10249592B2

公开(公告)日：2019-04-02

申请号：US15898604

申请日：2018-02-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michael Mostovoy ,  Gokul Kumar ,  Ning Ye ,  Hem Takiar ,  Venkatesh P. Ramachandra ,  Vinayak Ghatawade ,  Chih-Chin Liao

IPC: H01L21/78 ,  H01L21/56 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065

Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.

公开(公告)号：US20180174996A1

公开(公告)日：2018-06-21

申请号：US15898604

申请日：2018-02-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michael Mostovoy ,  Gokul Kumar ,  Ning Ye ,  Hem Takiar ,  Venkatesh P. Ramachandra ,  Vinayak Ghatawade ,  Chih-Chin Liao

IPC: H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L25/065 ,  H01L21/78

CPC classification number: H01L24/49 ,  H01L21/56 ,  H01L21/78 ,  H01L24/06 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0612 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48499 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/78301 ,  H01L2924/00014 ,  H01L2924/1436 ,  H01L2924/14511 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/01079 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.

公开(公告)号：US09899347B1

公开(公告)日：2018-02-20

申请号：US15454194

申请日：2017-03-09

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michael Mostovoy ,  Gokul Kumar ,  Ning Ye ,  Hem Takiar ,  Venkatesh P. Ramachandra ,  Vinayak Ghatawade ,  Chih-Chin Liao

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L24/49 ,  H01L21/56 ,  H01L21/78 ,  H01L24/06 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0612 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48499 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/78301 ,  H01L2924/00014 ,  H01L2924/1436 ,  H01L2924/14511 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/01079 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.