公开(公告)号：US20060221679A1

公开(公告)日：2006-10-05

申请号：US11315129

申请日：2005-12-23

申请人： Sang-beom Kang ,  Du-eung Kim ,  Baek-hyung Cho ,  Hye-jin Kim

发明人： Sang-beom Kang ,  Du-eung Kim ,  Baek-hyung Cho ,  Hye-jin Kim

IPC分类号： G11C11/00

CPC分类号： G11C13/0004 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/79

摘要： A method of programming a memory array including a plurality of memory cells is provided. The memory cells may include phase-change memory elements. In one aspect, the method includes applying in succession first through nth current pulses to each of the memory cells to be programmed to a first state (e.g., a crystalline state), where a current amplitude of the first through nth current pulses decreases with each successive pulse, and where a pulse duration of the first through nth current pulses increases with each successive pulse.

摘要翻译： 提供了一种编程包括多个存储单元的存储器阵列的方法。 存储器单元可以包括相变存储元件。 在一个方面，所述方法包括首先连续地将每个存储单元连续施加到要编程到第一状态（例如，结晶状态）的第n个/ 第一至第n个电流脉冲随着每个连续脉冲而减小，并且其中第一至第n个电流脉冲的脉冲持续时间随每个连续脉冲而增加。

公开(公告)号：US07515459B2

公开(公告)日：2009-04-07

申请号：US11315129

申请日：2005-12-23

申请人： Sang-beom Kang ,  Du-eung Kim ,  Beak-hyung Cho ,  Hye-jin Kim

发明人： Sang-beom Kang ,  Du-eung Kim ,  Beak-hyung Cho ,  Hye-jin Kim

IPC分类号： G11C11/00 ,  G11C7/00

CPC分类号： G11C13/0004 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/79

摘要： A method of programming a memory array including a plurality of memory cells is provided. The memory cells may include phase-change memory elements. In one aspect, the method includes applying in succession first through nth current pulses to each of the memory cells to be programmed to a first state (e.g., a crystalline state), where a current amplitude of the first through nth current pulses decreases with each successive pulse, and where a pulse duration of the first through nth current pulses increases with each successive pulse.

摘要翻译： 提供了一种编程包括多个存储单元的存储器阵列的方法。 存储器单元可以包括相变存储元件。 在一个方面，该方法包括将第一至第n电流脉冲连续地应用于要被编程到第一状态（例如，结晶状态）的每个存储器单元，其中第一至第n电流脉冲的电流幅度随着每个 连续脉冲，并且其中第一至第n电流脉冲的脉冲持续时间随着每个连续脉冲而增加。

公开(公告)号：US20060215480A1

公开(公告)日：2006-09-28

申请号：US11316878

申请日：2005-12-27

申请人： Hye-jin Kim ,  Choong-keun Kwak ,  Woo-yeong Cho ,  Sang-beom Kang

发明人： Hye-jin Kim ,  Choong-keun Kwak ,  Woo-yeong Cho ,  Sang-beom Kang

IPC分类号： G11C8/00

CPC分类号： G11C13/0028 ,  G11C13/0004

摘要： A semiconductor memory device of one aspect includes a memory cell block including n global word lines, and corresponding m sub word lines for each of the n global word lines, where n and m are natural numbers. The memory device further includes a plurality of word line driving circuits which respectively control a voltage of the sub word lines according to a logic level of each corresponding global word line and inputted address signals, and a plurality of control circuits which transmit the address signals to the word line driving circuits or interrupt transmission of the address signals according to the logic level of the global word line. Each of the word line driving circuits includes a first transistor which maintains the voltage of the respective sub word line at a first voltage and a second transistor which maintains the voltage of the sub word line at the first voltage or a second voltage.

摘要翻译： 一个方面的半导体存储器件包括包括n个全局字线的存储单元块，以及n个全局字线中的每一个的对应m个子字线，其中n和m是自然数。 存储装置还包括多个字线驱动电路，其分别根据每个对应的全局字线和输入的地址信号的逻辑电平分别控制子字线的电压，以及多个控制电路，其将地址信号发送到 字线驱动电路或根据全局字线的逻辑电平中断地址信号的传输。 每个字线驱动电路包括将相应子字线的电压维持在第一电压的第一晶体管和将子字线的电压维持在第一电压或第二电压的第二晶体管。

公开(公告)号：US07701757B2

公开(公告)日：2010-04-20

申请号：US11834845

申请日：2007-08-07

申请人： Hye-jin Kim ,  Kwang-jin Lee ,  Du-eung Kim

发明人： Hye-jin Kim ,  Kwang-jin Lee ,  Du-eung Kim

IPC分类号： G11C11/00

CPC分类号： G11C13/0064 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0092

摘要： A method of operating a phase change random access memory (PRAM) device comprises performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.

摘要翻译： 一种操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选择的PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。

公开(公告)号：US20060209616A1

公开(公告)日：2006-09-21

申请号：US11319604

申请日：2005-12-29

申请人： Hye-jin Kim ,  Du-eung Kim ,  Beak-hyung Cho ,  Hyung-rok Oh

发明人： Hye-jin Kim ,  Du-eung Kim ,  Beak-hyung Cho ,  Hyung-rok Oh

IPC分类号： G11C8/00

CPC分类号： G11C13/0004 ,  G11C8/08 ,  G11C13/0028

摘要： A semiconductor memory device includes a plurality of wordline driving circuits adapted to control the voltage level of a sub-wordline in response to a logic state of a global wordline and an address signal. The wordline driving circuit comprises first and second transistors configured to maintain the sub-wordline at a first voltage level when the global wordline and the address signal have a first logic state and at a second voltage level when the global wordline or the address signal have a second logic state.

公开(公告)号：US07349245B2

公开(公告)日：2008-03-25

申请号：US11486100

申请日：2006-07-14

申请人： Hye-jin Kim ,  Kwang-jin Lee ,  Sang-Beom Kang ,  Mu-hui Park

发明人： Hye-jin Kim ,  Kwang-jin Lee ,  Sang-Beom Kang ,  Mu-hui Park

IPC分类号： G11C11/00 ,  G11C11/14

CPC分类号： G11C8/12 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0078

摘要： A method of performing a program-suspend-read operation in a PRAM device comprises programming a write block comprising N unit program blocks in response to a program operation request, and suspending the program operation after programming M unit program blocks, where M is less than N, in response to a read operation request. The method further comprises executing the requested read operation, and then resuming the programming of the write data block and programming (N−M) remaining unit program blocks.

摘要翻译： 一种在PRAM设备中执行程序挂起读取操作的方法包括响应于程序操作请求编程包含N个单元程序块的写入块，并且在对M个单元程序块进行编程之后暂停编程操作，其中M小于 N，响应于读取操作请求。 该方法还包括执行所请求的读取操作，然后恢复写入数据块和编程（N-M）剩余单元程序块的编程。

公开(公告)号：US20130311717A1

公开(公告)日：2013-11-21

申请号：US13768858

申请日：2013-02-15

申请人： Chan-kyung Kim ,  Dong-seok Kang ,  Hye-jin Kim ,  Chul-woo Park ,  Dong-hyun Sohn ,  Yun-sang Lee ,  Sang-beom Kang ,  Hyung-rok Oh ,  Soo-ho Cha

发明人： Chan-kyung Kim ,  Dong-seok Kang ,  Hye-jin Kim ,  Chul-woo Park ,  Dong-hyun Sohn ,  Yun-sang Lee ,  Sang-beom Kang ,  Hyung-rok Oh ,  Soo-ho Cha

IPC分类号： G11C11/16 ,  G06F12/02

CPC分类号： G11C11/165 ,  G06F12/0246 ,  G11C11/161 ,  G11C11/1653 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693

摘要： A magnetic random access memory (MRAM), and a memory module, memory system including the same, and method for controlling the same are disclosed. The MRAM includes magnetic memory cells configured to change between at least two states according to a magnetization direction, and a mode register supporting a plurality of operational modes.

摘要翻译： 公开了一种磁性随机存取存储器（MRAM）及其存储器模块，包括该存储器模块的存储器系统及其控制方法。 MRAM包括被配置为根据磁化方向在至少两个状态之间改变的磁存储单元和支持多个操作模式的模式寄存器。

公开(公告)号：US07391669B2

公开(公告)日：2008-06-24

申请号：US11316878

申请日：2005-12-27

申请人： Hye-jin Kim ,  Choong-keun Kwak ,  Woo-yeong Cho ,  Sang-beom Kang

发明人： Hye-jin Kim ,  Choong-keun Kwak ,  Woo-yeong Cho ,  Sang-beom Kang

IPC分类号： G11C8/00

CPC分类号： G11C13/0028 ,  G11C13/0004

摘要： A semiconductor memory device of one aspect includes a memory cell block including n global word lines, and corresponding m sub word lines for each of the n global word lines, where n and m are natural numbers. The memory device further includes a plurality of word line driving circuits which respectively control a voltage of the sub word lines according to a logic level of each corresponding global word line and inputted address signals, and a plurality of control circuits which transmit the address signals to the word line driving circuits or interrupt transmission of the address signals according to the logic level of the global word line. Each of the word line driving circuits includes a first transistor which maintains the voltage of the respective sub word line at a first voltage and a second transistor which maintains the voltage of the sub word line at the first voltage or a second voltage.

摘要翻译： 一个方面的半导体存储器件包括包括n个全局字线的存储单元块，以及n个全局字线中的每一个的对应m个子字线，其中n和m是自然数。 存储装置还包括多个字线驱动电路，其分别根据每个对应的全局字线和输入的地址信号的逻辑电平分别控制子字线的电压，以及多个控制电路，其将地址信号发送到 字线驱动电路或根据全局字线的逻辑电平中断地址信号的传输。 每个字线驱动电路包括将相应子字线的电压维持在第一电压的第一晶体管和将子字线的电压维持在第一电压或第二电压的第二晶体管。

公开(公告)号：US20070217253A1

公开(公告)日：2007-09-20

申请号：US11486100

申请日：2006-07-14

申请人： Hye-jin Kim ,  Kwang-jin Lee ,  Sang-Beom Kang ,  Mu-hui Park

发明人： Hye-jin Kim ,  Kwang-jin Lee ,  Sang-Beom Kang ,  Mu-hui Park

IPC分类号： G11C11/00

CPC分类号： G11C8/12 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0078

摘要： A method of performing a program-suspend-read operation in a PRAM device comprises programming a write block comprising N unit program blocks in response to a program operation request, and suspending the program operation after programming M unit program blocks, where M is less than N, in response to a read operation request. The method further comprises executing the requested read operation, and then resuming the programming of the write data block and programming (N−M) remaining unit program blocks.

摘要翻译： 一种在PRAM设备中执行程序挂起读取操作的方法包括响应于程序操作请求编程包含N个单元程序块的写入块，并且在对M个单元程序块进行编程之后暂停编程操作，其中M小于 N，响应于读取操作请求。 该方法还包括执行所请求的读取操作，然后恢复写入数据块和编程（N-M）剩余单元程序块的编程。

公开(公告)号：US08320168B2

公开(公告)日：2012-11-27

申请号：US13108143

申请日：2011-05-16

申请人： Hye-jin Kim ,  Kwang-jin Lee ,  Du-eung Kim

发明人： Hye-jin Kim ,  Kwang-jin Lee ,  Du-eung Kim

IPC分类号： G11C11/00

CPC分类号： G11C13/0064 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0092

摘要： A method of operating a phase change random access memory (PRAM) device includes performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.

摘要翻译： 操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。