公开(公告)号：US07348069B2

公开(公告)日：2008-03-25

申请号：US10951731

申请日：2004-09-29

申请人： Seiji Ichiyanagi ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama

发明人： Seiji Ichiyanagi ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama

IPC分类号： C03C27/02 ,  B32B3/00 ,  G03C5/00

CPC分类号： H01G2/065 ,  H01G4/33 ,  H01L23/49894 ,  H01L27/016 ,  H01L29/78603 ,  H01L2224/13 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K1/162 ,  Y10S428/901 ,  Y10T428/12604 ,  Y10T428/24364 ,  Y10T428/24926 ,  Y10T428/249957 ,  Y10T428/315

摘要： A first ceramic substrate includes a substrate (2) and a glaze layer (3), wherein the glaze layer has a surface having an Ra of 0.02 μm or less and a Ry of 0.25 μm or less. A second ceramic substrate is formed by subjecting a glass layer (24) formed on a surface of a substrate (2) to heating-and-pressurizing treatment, thereby forming a glaze layer (3) on the substrate (2), and planarization-polishing the surface of the glaze layer. A third ceramic substrate includes a substrate (2), a glaze layer (3) containing substantially no pores formed on the substrate (2) and the surface thereof being planarization-polished, and a wiring pattern (21), wherein at least one first end of the wiring pattern is exposed to the glaze layer (3) surface of the substrate (1), and at least one second end is exposed to another surface of the substrate (1).

摘要翻译： 第一陶瓷基板包括基板（2）和釉层（3），其中，所述釉层具有Ra为0.02μm以下且Ry为0.25μm以下的表面。 通过对形成在基板（2）的表面上的玻璃层（24）进行加热加压处理，从而在基板（2）上形成釉层（3），形成第二陶瓷基板， 抛光釉层的表面。 第三陶瓷基板包括基板（2），在基板（2）上形成有基本上没有孔的表面和平坦化抛光的表面的釉层（3）和布线图案（21），其中至少一个第一 布线图案的端部暴露于基板（1）的釉层（3）表面，并且至少一个第二端部暴露于基板（1）的另一表面。

公开(公告)号：US20050078433A1

公开(公告)日：2005-04-14

申请号：US10951731

申请日：2004-09-29

申请人： Seiji Ichiyanagi ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama

发明人： Seiji Ichiyanagi ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama

IPC分类号： H01L27/04 ,  C04B41/85 ,  H01G2/06 ,  H01G4/06 ,  H01G4/30 ,  H01G4/33 ,  H01L23/15 ,  H01L23/498 ,  H01L27/01 ,  H01L29/786 ,  H05K1/03 ,  H05K1/16

CPC分类号： H01G2/065 ,  H01G4/33 ,  H01L23/49894 ,  H01L27/016 ,  H01L29/78603 ,  H01L2224/13 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K1/162 ,  Y10S428/901 ,  Y10T428/12604 ,  Y10T428/24364 ,  Y10T428/24926 ,  Y10T428/249957 ,  Y10T428/315

摘要： A first ceramic substrate includes a substrate (2) and a glaze layer (3), wherein the glaze layer has a surface having an Ra of 0.02 μm or less and a Ry of 0.25 μm or less. A second ceramic substrate is formed by subjecting a glass layer (24) formed on a surface of a substrate (2) to heating-and-pressurizing treatment, thereby forming a glaze layer (3) on the substrate (2), and planarization-polishing the surface of the glaze layer. A third ceramic substrate includes a substrate (2), a glaze layer (3) containing substantially no pores formed on the substrate (2) and the surface thereof being planarization-polished, and a wiring pattern (21), wherein at least one first end of the wiring pattern is exposed to the glaze layer (3) surface of the substrate (1), and at least one second end is exposed to another surface of the substrate (1).

摘要翻译： 第一陶瓷基板包括基板（2）和釉层（3），其中，所述釉层具有Ra为0.02μm以下且Ry为0.25μm以下的表面。 通过对形成在基板（2）的表面上的玻璃层（24）进行加热加压处理，从而在基板（2）上形成釉层（3），形成第二陶瓷基板， 抛光釉层的表面。 第三陶瓷基板包括基板（2），在基板（2）上形成有基本上没有孔的表面和平坦化抛光的表面的釉层（3）和布线图案（21），其中至少一个第一 布线图案的端部暴露于基板（1）的釉层（3）表面，并且至少一个第二端部暴露于基板（1）的另一表面。

公开(公告)号：US20100300740A1

公开(公告)日：2010-12-02

申请号：US12791303

申请日：2010-06-01

申请人： Seiji Ichiyanagi ,  Kenji Murakami ,  Motohiko Sato ,  Jun Otsuka ,  Masahiko Okuyama

发明人： Seiji Ichiyanagi ,  Kenji Murakami ,  Motohiko Sato ,  Jun Otsuka ,  Masahiko Okuyama

IPC分类号： H05K1/16 ,  H01G4/06

CPC分类号： H05K1/0231 ,  H01G4/232 ,  H01G4/30 ,  H01G4/33 ,  H01L23/49822 ,  H01L23/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/09701 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10712 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A ceramic capacitor includes a capacitor body and a metal layer arranged on an outer surface of the capacitor body. The outer surface includes: a first capacitor major surface; a second capacitor major surface opposite to the first capacitor major surface in a thickness direction of the capacitor body; and a capacitor lateral surface between the first and second capacitor major surfaces. The capacitor body includes a first layer section and a second layer section. The first layer section includes a plurality of ceramic dielectric layers and a plurality of internal electrodes, wherein the ceramic dielectric layers and the internal electrodes are layered alternately. The second layer section is exposed at the first capacitor major surface, and includes a corner portion at a boundary between the first capacitor major surface and the capacitor lateral surface. The metal layer covers the corner portion of the second layer section.

摘要翻译： 陶瓷电容器包括电容器主体和布置在电容器主体的外表面上的金属层。 外表面包括：第一电容器主表面; 与电容器主体的厚度方向上的第一电容器主表面相反的第二电容器主表面; 以及在第一和第二电容器主表面之间的电容器横向表面。 电容器主体包括第一层部分和第二层部分。 第一层部分包括多个陶瓷电介质层和多个内部电极，其中陶瓷电介质层和内部电极交替层叠。 第二层部分在第一电容器主表面处露出，并且包括在第一电容器主表面和电容器侧表面之间的边界处的拐角部分。 金属层覆盖第二层部分的角部。

公开(公告)号：US08369064B2

公开(公告)日：2013-02-05

申请号：US12791303

申请日：2010-06-01

申请人： Seiji Ichiyanagi ,  Kenji Murakami ,  Motohiko Sato ,  Jun Otsuka ,  Masahiko Okuyama

发明人： Seiji Ichiyanagi ,  Kenji Murakami ,  Motohiko Sato ,  Jun Otsuka ,  Masahiko Okuyama

IPC分类号： H01G4/06 ,  H01G4/005

CPC分类号： H05K1/0231 ,  H01G4/232 ,  H01G4/30 ,  H01G4/33 ,  H01L23/49822 ,  H01L23/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/09701 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10712 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A ceramic capacitor includes a capacitor body and a metal layer arranged on an outer surface of the capacitor body. The outer surface includes: a first capacitor major surface; a second capacitor major surface opposite to the first capacitor major surface in a thickness direction of the capacitor body; and a capacitor lateral surface between the first and second capacitor major surfaces. The capacitor body includes a first layer section and a second layer section. The first layer section includes a plurality of ceramic dielectric layers and a plurality of internal electrodes, wherein the ceramic dielectric layers and the internal electrodes are layered alternately. The second layer section is exposed at the first capacitor major surface, and includes a corner portion at a boundary between the first capacitor major surface and the capacitor lateral surface. The metal layer covers the corner portion of the second layer section.

摘要翻译： 陶瓷电容器包括电容器主体和布置在电容器主体的外表面上的金属层。 外表面包括：第一电容器主表面; 与电容器主体的厚度方向上的第一电容器主表面相反的第二电容器主表面; 以及在第一和第二电容器主表面之间的电容器横向表面。 电容器主体包括第一层部分和第二层部分。 第一层部分包括多个陶瓷电介质层和多个内部电极，其中陶瓷电介质层和内部电极交替层叠。 第二层部分在第一电容器主表面处露出，并且包括在第一电容器主表面和电容器侧表面之间的边界处的拐角部分。 金属层覆盖第二层部分的角部。

公开(公告)号：US08072732B2

公开(公告)日：2011-12-06

申请号：US12100527

申请日：2008-04-10

申请人： Motohiko Sato ,  Kenji Murakami ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama ,  Kozo Yamazaki

发明人： Motohiko Sato ,  Kenji Murakami ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama ,  Kozo Yamazaki

IPC分类号： H01G4/005

CPC分类号： H05K1/0231 ,  H01G4/232 ,  H01G4/30 ,  H01G4/33 ,  H01L23/50 ,  H01L23/642 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10712 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A capacitor is provided having a tough surface portion which prevents cracking that tends to occur when the capacitor is built-in or surface-mounted on a wiring board. A ceramic sintered body of the capacitor includes a capacitor forming layer portion, a cover layer portion and an interlayer portion. The capacitor forming layer portion has a laminated structure wherein ceramic dielectric layers and inner electrodes connected to a peripheral portion of capacitor via conductors, are alternately laminated. The cover layer portion is exposed at a surface portion of the ceramic body and has a laminated structure wherein ceramic dielectric layers and dummy electrodes not connected to the capacitor via conductors, are alternately laminated.

摘要翻译： 提供一种电容器，其具有坚韧的表面部分，其防止当电容器内置或表面安装在布线板上时容易发生的开裂。 电容器的陶瓷烧结体包括电容器形成层部分，覆盖层部分和中间层部分。 电容器形成层部分具有层叠结构，其中陶瓷电介质层和连接到电容器通孔导体的周边部分的内部电极交替层叠。 覆盖层部分在陶瓷体的表面部分露出，并且具有层叠结构，其中不连接到电容器通孔导体的陶瓷电介质层和虚拟电极交替层叠。

公开(公告)号：US20070117338A1

公开(公告)日：2007-05-24

申请号：US11603161

申请日：2006-11-22

申请人： Hiroshi Yamamoto ,  Toshitake Seki ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama

发明人： Hiroshi Yamamoto ,  Toshitake Seki ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama

IPC分类号： H01L21/20 ,  H01L29/00

CPC分类号： H05K1/186 ,  H01G4/232 ,  H01G4/30 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/112 ,  H05K3/4602 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2924/00

摘要： A via array capacitor comprising: a capacitor body including a first main surface and a second main surface and having a structure in which dielectric layers and inner electrode layers are alternately laminated; a plurality of via conductors which conduct the inner electrode layers to each other and are, as a whole, arranged in array form; and metal-containing layers which are disposed on at least one of the first main surface and the second main surface, wherein a total of a thickness of the metal-containing layers disposed on the first main surface and a thickness of the metal-containing layers disposed on the second main surface is from 15% to 80% of an overall thickness of the via array capacitor.

摘要翻译： 一种通孔阵列电容器，包括：电容器主体，包括第一主表面和第二主表面，并且具有交替层叠电介质层和内电极层的结构; 多个通孔导体，其将内部电极层彼此导引并且整体上排列成阵列形式; 和设置在第一主表面和第二主表面中的至少一个上的含金属层，其中设置在第一主表面上的含金属层的厚度和含金属层的厚度的总和 设置在第二主表面上的通孔阵列电容器的总厚度的15％至80％。

公开(公告)号：US07580240B2

公开(公告)日：2009-08-25

申请号：US11603161

申请日：2006-11-22

申请人： Hiroshi Yamamoto ,  Toshitake Seki ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama

发明人： Hiroshi Yamamoto ,  Toshitake Seki ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama

IPC分类号： H01G4/06 ,  H01G4/228

CPC分类号： H05K1/186 ,  H01G4/232 ,  H01G4/30 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/112 ,  H05K3/4602 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2924/00

摘要： A via array capacitor including a capacitor body having a first main surface and a second main surface and having a structure in which dielectric layers and inner electrode layers are alternately laminated; a plurality of via conductors which conduct the inner electrode layers to each other and are, as a whole, arranged in array form; and metal-containing layers which are disposed on at least one of the first main surface and the second main surface, wherein a total volume of the inner electrode layers and the metal-containing layers included in the via array capacitor is from 45 vol.% to 95 vol.% of a volume of the via array capacitor.

摘要翻译： 一种通孔阵列电容器，包括具有第一主表面和第二主表面的电容器体，并且具有其中电介质层和内电极层交替层叠的结构; 多个通孔导体，其将内部电极层彼此导引并且整体上排列成阵列形式; 和设置在第一主表面和第二主表面中的至少一个上的含金属层，其中包含在通孔阵列电容器中的内部电极层和含金属层的总体积为45体积％ 至95体积％的通孔阵列电容器的体积。

公开(公告)号：US20080251285A1

公开(公告)日：2008-10-16

申请号：US12100527

申请日：2008-04-10

申请人： Motohiko Sato ,  Kenji Murakami ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama ,  Kozo Yamazaki

发明人： Motohiko Sato ,  Kenji Murakami ,  Jun Otsuka ,  Manabu Sato ,  Masahiko Okuyama ,  Kozo Yamazaki

IPC分类号： H01G4/06 ,  H05K1/16

CPC分类号： H05K1/0231 ,  H01G4/232 ,  H01G4/30 ,  H01G4/33 ,  H01L23/50 ,  H01L23/642 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10712 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A capacitor is provided having a tough surface portion which prevents cracking that tends to occur when the capacitor is built-in or surface-mounted on a wiring board. A ceramic sintered body of the capacitor includes a capacitor forming layer portion, a cover layer portion and an interlayer portion. The capacitor forming layer portion has a laminated structure wherein ceramic dielectric layers and inner electrodes connected to a peripheral portion of capacitor via conductors, are alternately laminated. The cover layer portion is exposed at a surface portion of the ceramic body and has a laminated structure wherein ceramic dielectric layers and dummy electrodes not connected to the capacitor via conductors, are alternately laminated.

摘要翻译： 提供一种电容器，其具有坚韧的表面部分，其防止当电容器内置或表面安装在布线板上时容易发生的开裂。 电容器的陶瓷烧结体包括电容器形成层部分，覆盖层部分和中间层部分。 电容器形成层部分具有层叠结构，其中陶瓷电介质层和连接到电容器通孔导体的周边部分的内部电极交替层叠。 覆盖层部分在陶瓷体的表面部分露出，并且具有层叠结构，其中不连接到电容器通孔导体的陶瓷电介质层和虚拟电极交替层叠。

公开(公告)号：USRE38491E1

公开(公告)日：2004-04-06

申请号：US09526502

申请日：2000-03-15

申请人： Hidetoshi Mizutani ,  Masahiko Okuyama ,  Noritaka Yoshida ,  Hirofumi Ozeki ,  Hiroshi Katagiri

发明人： Hidetoshi Mizutani ,  Masahiko Okuyama ,  Noritaka Yoshida ,  Hirofumi Ozeki ,  Hiroshi Katagiri

IPC分类号： C04B35468

CPC分类号： C04B35/468 ,  C04B35/462 ,  C04B35/6261 ,  C04B35/62625 ,  C04B2235/3205 ,  C04B2235/3206 ,  C04B2235/3213 ,  C04B2235/3244 ,  C04B2235/3251 ,  C04B2235/3258 ,  C04B2235/3267 ,  C04B2235/3284 ,  C04B2235/3293 ,  C04B2235/36 ,  C04B2235/5436 ,  C04B2235/604 ,  C04B2235/79

摘要： Powders of BaCO3, TiO2, ZnO, etc. are mixed to each other at a predetermined ratio of quantity, calcined in an atmospheric air at &pgr;°-120° C., and pulverized to obtain a calcined powder having an average grain size from 1 to 3 &mgr; m, 0.1 to 20 parts-by weight of a powder having an average grain size from 0.1 to 1.5 &mgr;m comprising a glass having a transition point of not higher than 450° C. obtained by mixing powders of Pb3O4, SiO2, Na2O, etc. to each other, melting and then pouring into water and pulverizing the thus obtained glass is admixed to the calcined powder. The mixture is dried, pelleted by adding a resin and the pellet powder is molded into a cylindrical shape, applied with CIP (Cold isotartic press), and the molding product after the treatment is sintered in an atmospheric air at 850° to 1000° C. to obtain a dielectric ceramic sintered at low temperature. The resultant dielectric ceramic has high denseness and high unloaded Q value while maintaining &tgr;f within a practical range.

公开(公告)号：US5922444A

公开(公告)日：1999-07-13

申请号：US310999

申请日：1994-09-22

申请人： Masashi Tsuzuki ,  Masahiko Okuyama

发明人： Masashi Tsuzuki ,  Masahiko Okuyama

IPC分类号： C03C3/064 ,  C03C3/066 ,  C03C3/068 ,  C03C3/145 ,  C03C3/19 ,  C03C8/02 ,  C03C8/08 ,  H01C7/00 ,  H01C17/00 ,  H01C17/06 ,  B32B17/06 ,  B32B18/00

CPC分类号： C03C3/068 ,  C03C3/064 ,  C03C3/066 ,  C03C3/145 ,  C03C3/19 ,  C03C8/02 ,  C03C8/08 ,  H01C17/006 ,  H01C17/06 ,  H01C7/003

摘要： A glaze composition suitable for a thin chip substrate, for example. The glaze composition makes a low-temperature glazing possible and is superior in the electrical and chemical stability. The glaze composition can prevent even a thin substrate from warping and can easily form an extensive smooth glaze layer without deteriorating a thin glaze face. The components of the composition are 20% to 50% by weight of boron oxide, 5% to 35% by weight of aluminum oxide, and 15% to 55% by weight of at least one alkaline-earth oxide selected from the group consisting of calcium oxide, strontium oxide, magnesium oxide and barium oxide.

摘要翻译： 例如，适用于薄片基板的釉料组合物。 釉料组合物使低温玻璃成为可能，且电化学稳定性优异。 釉料组合物可以防止甚至薄的基材翘曲，并且可以容易地形成广泛的光滑的釉层，而不会使薄的釉面变质。 组合物的组分为氧化硼的20重量％至50重量％，氧化铝为5重量％至35重量％，至少一种选自以下的碱土金属氧化物为15重量％至55重量％ 氧化钙，氧化锶，氧化镁和氧化钡。