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    SEPARATION METHOD, LIGHT-EMITTING DEVICE, MODULE, AND ELECTRONIC DEVICE
    2.
    发明申请
    SEPARATION METHOD, LIGHT-EMITTING DEVICE, MODULE, AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20180047902A1

    公开(公告)日：2018-02-15

    申请号：US15728575

    申请日：2017-10-10

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Seiji YASUMOTO ,  Masataka SATO ,  Masafumi NOMURA ,  Toshiyuki MIYAMOTO

    IPC: H01L51/00

    CPC classification number: H01L51/003 ,  H01L2251/5338

    Abstract: A method for manufacturing a flexible semiconductor device is disclosed. The method includes: forming a separation layer of a metal over a substrate; treating the separation layer with plasma under an atmosphere containing nitrogen, oxygen, silicon, and hydrogen; forming a layer over the plasma-treated separation layer, the layer being capable of supplying hydrogen and nitrogen to the separation layer; forming a functional layer over the separation layer; performing heat treatment to promote the release of hydrogen and nitrogen from the layer; and separating the substrate at the separation layer. The method allows the formation of an extremely thin oxide layer over the separation layer, which facilitates the separation, reduces the probability that the oxide layer remains under the layer, and contributes to the increase in efficiency of a device included in the functional layer.

    PEELING METHOD, SEMICONDUCTOR DEVICE, AND PEELING APPARATUS
    6.
    发明申请
    PEELING METHOD, SEMICONDUCTOR DEVICE, AND PEELING APPARATUS 有权
    剥离方法，半导体器件和剥离装置

    公开(公告)号：US20140234664A1

    公开(公告)日：2014-08-21

    申请号：US14182834

    申请日：2014-02-18

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Seiji YASUMOTO ,  Masataka SATO ,  Shingo EGUCHI ,  Kunihiko SUZUKI

    IPC: H01L21/683

    CPC classification number: H01L21/6836 ,  B32B38/10 ,  H01L21/67132 ,  H01L21/6835 ,  H01L51/003 ,  H01L51/0097 ,  H01L51/50 ,  H01L2221/68318 ,  H01L2221/6835 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2221/68386 ,  Y10T156/1712

    Abstract: To improve peelability, yield in a peeling step, and yield in manufacturing a flexible device. A peeling method is employed which includes a first step of forming a peeling layer containing tungsten over a support substrate; a second step of forming, over the peeling layer, a layer to be peeled formed of a stack including a first layer containing silicon oxynitride and a second layer containing silicon nitride in this order and forming an oxide layer containing tungsten oxide between the peeling layer and the layer to be peeled; a third step of forming a compound containing tungsten and nitrogen in the oxide layer by heat treatment; and a fourth step of peeling the peeling layer from the layer to be peeled at the oxide layer.

    Abstract translation: 为了提高剥离性，剥离工序的收率，柔软装置的制造成品率。 采用剥离方法，该方法包括在载体基材上形成含有钨的剥离层的第一步骤; 在剥离层上形成由包含含有氮氧化硅的第一层和包含氮化硅的第二层的堆叠形成的剥离层的第二步骤，并且在剥离层和剥离层之间形成含有氧化钨的氧化物层 要剥离的层; 通过热处理在氧化物层中形成含有钨和氮的化合物的第三步骤; 以及从氧化物层剥离的层剥离剥离层的第四工序。

    SEMICONDUCTOR DEVICE
    7.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20230317856A1

    公开(公告)日：2023-10-05

    申请号：US18132527

    申请日：2023-04-10

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI ,  Yasutaka NAKAZAWA ,  Seiji YASUMOTO ,  Shunpei YAMAZAKI

    IPC: H01L29/786 ,  H01L27/12 ,  H05B33/22

    CPC classification number: H01L29/7869 ,  H01L29/78603 ,  H01L29/78696 ,  H01L27/1225 ,  H05B33/22 ,  H10K50/00

    Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. A semiconductor device includes a first insulating layer, a second insulating layer, a semiconductor layer, and a first conductive layer. The semiconductor layer, the second insulating layer, and the first conductive layer are stacked in this order over the first insulating layer. The second insulating layer has a stacked-layer structure in which a first insulating film, a second insulating film, and a third insulating film are stacked in this order. The first insulating film, the second insulating film, and the third insulating film each contain an oxide. The first insulating film includes a portion in contact with the semiconductor layer. The semiconductor layer contains indium, gallium, and oxygen and includes a region with an indium content percentage higher than a gallium content percentage.

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