公开(公告)号：US20180233358A1

公开(公告)日：2018-08-16

申请号：US15906596

申请日：2018-02-27

申请人： KWANSEI GAKUIN EDUCATIONAL FOUNDATION

发明人： Tadaaki Kaneko ,  Noboru Ohtani ,  Kenta Hagiwara

IPC分类号： H01L21/02 ,  H01L21/04 ,  H01L21/306 ,  H01L29/16 ,  H01L21/67 ,  H01L21/677 ,  H01L21/687 ,  H01L21/324 ,  H01L29/04 ,  H01L21/302 ,  C30B31/22 ,  H01L21/3065 ,  C30B29/36

CPC分类号： H01L21/02529 ,  C30B29/36 ,  C30B31/22 ,  H01L21/02019 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/0262 ,  H01L21/02623 ,  H01L21/02658 ,  H01L21/0415 ,  H01L21/046 ,  H01L21/0475 ,  H01L21/0485 ,  H01L21/049 ,  H01L21/302 ,  H01L21/30625 ,  H01L21/3065 ,  H01L21/324 ,  H01L21/67109 ,  H01L21/67757 ,  H01L21/68764 ,  H01L21/68771 ,  H01L29/045 ,  H01L29/1608

摘要： In this method for manufacturing a semiconductor element, a modified layer produced by subjecting a substrate (70) to mechanical polishing is removed by heating the substrate (70) under Si vapor pressure. An epitaxial layer formation step, an ion implantation step, an ion activation step, and a second removal step are then performed. In the second removal step, macro-step bunching and insufficient ion-implanted portions of the surface of the substrate (70) performed the ion activation step are removed by heating the substrate (70) under Si vapor pressure. After that, an electrode formation step in which electrodes are formed on the substrate (70) is performed.

公开(公告)号：US09941116B2

公开(公告)日：2018-04-10

申请号：US14897380

申请日：2014-06-06

申请人： KWANSEI GAKUIN EDUCATIONAL FOUNDATION

发明人： Tadaaki Kaneko ,  Noboru Ohtani ,  Kenta Hagiwara

IPC分类号： H01L21/20 ,  H01L21/36 ,  H01L21/02 ,  C30B29/36 ,  C30B31/22 ,  H01L21/302 ,  H01L21/67 ,  H01L21/677 ,  H01L21/687 ,  H01L21/3065 ,  H01L29/16 ,  H01L21/04 ,  H01L29/04 ,  H01L21/306 ,  H01L21/324

CPC分类号： H01L21/02529 ,  C30B29/36 ,  C30B31/22 ,  H01L21/02019 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/0262 ,  H01L21/02623 ,  H01L21/02658 ,  H01L21/0415 ,  H01L21/046 ,  H01L21/0475 ,  H01L21/0485 ,  H01L21/049 ,  H01L21/302 ,  H01L21/30625 ,  H01L21/3065 ,  H01L21/324 ,  H01L21/67109 ,  H01L21/67757 ,  H01L21/68764 ,  H01L21/68771 ,  H01L29/045 ,  H01L29/1608

摘要： In this method for manufacturing a semiconductor element, a modified layer produced by subjecting a substrate (70) to mechanical polishing is removed by heating the substrate (70) under Si vapor pressure. An epitaxial layer formation step, an ion implantation step, an ion activation step, and a second removal step are then performed. In the second removal step, macro-step bunching and insufficient ion-implanted portions of the surface of the substrate (70) performed the ion activation step are removed by heating the substrate (70) under Si vapor pressure. After that, an electrode formation step in which electrodes are formed on the substrate (70) is performed.

公开(公告)号：US09911602B2

公开(公告)日：2018-03-06

申请号：US15232860

申请日：2016-08-10

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： William J. Gallagher ,  Effendi Leobandung ,  Devendra K. Sadana ,  Ghavam G. Shahidi

IPC分类号： H01L31/0256 ,  H01L21/02 ,  H01L33/32 ,  H01L21/762 ,  H01L21/3065 ,  H01L21/311 ,  H01L33/00 ,  H01L21/033 ,  H01L21/4757 ,  H01L33/20

CPC分类号： H01L21/02694 ,  H01L21/02002 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02623 ,  H01L21/02631 ,  H01L21/0332 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/31116 ,  H01L21/47573 ,  H01L21/76283 ,  H01L33/0025 ,  H01L33/0066 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/20 ,  H01L33/32

摘要： A method and structure for integrating gallium nitride into a semiconductor substrate. The method may also include means for isolating the gallium nitride from the semiconductor substrate.

公开(公告)号：US09620625B2

公开(公告)日：2017-04-11

申请号：US14764516

申请日：2014-01-28

申请人： Technische Universiteit Delft

发明人： Ryoichi Ishihara ,  Michiel Van Der Zwan ,  Miki Trifunovic

IPC分类号： H01L21/02 ,  H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L21/268 ,  H01L21/324 ,  H01L29/04 ,  H01L29/06 ,  H01L29/16 ,  B82Y30/00

CPC分类号： H01L29/66757 ,  B82Y30/00 ,  H01L21/02532 ,  H01L21/02623 ,  H01L21/02656 ,  H01L21/02664 ,  H01L21/2686 ,  H01L21/324 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1292 ,  H01L29/04 ,  H01L29/0669 ,  H01L29/16 ,  H01L29/78666 ,  H01L29/78675 ,  H01L29/78696

摘要： A method for manufacturing a submicron semiconductor structure on a substrate, including: forming at least one template layer over a support substrate; forming one or more template structures, including one or more recesses and/or mesas, in the template layer, the one or more template structures including one or more edges extending into or out of the top surface of the template layer; coating at least part of the one or more template structures with a liquid semiconductor precursor; and, annealing and/or exposing the liquid semiconductor precursor coated template structures to light, wherein during the annealing and/or light exposure a part of the liquid semiconductor precursor accumulates by capillary forces against at least part of the one or more edges, the annealing and/or light exposure transforming the accumulated liquid semiconductor precursor into a submicron semiconductor structure extending along at least part of the one or more edges.

公开(公告)号：US09595437B2

公开(公告)日：2017-03-14

申请号：US14787221

申请日：2014-04-28

申请人： Technische Universiteit Delft

发明人： Ryoichi Ishihara ,  Miki Trifunovic ,  Michiel Van Der Zwan

IPC分类号： H01L21/02 ,  C30B7/00 ,  C30B29/06 ,  C30B7/14 ,  H01L31/18 ,  H01L31/20

CPC分类号： H01L21/02532 ,  C30B7/00 ,  C30B7/14 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/02623 ,  H01L21/02686 ,  H01L31/182 ,  H01L31/202

摘要： A method for forming a silicon layer using a liquid silane compound is described. The method includes the steps of: forming a first layer on a substrate, preferably a flexible substrate, the first layer having a (poly)silane; and, irradiating with light having one or more wavelength within the range between 200 and 400 nm for transforming the polysilane in silicon, preferably amorphous silicon or polysilicon.

摘要翻译： 描述了使用液态硅烷化合物形成硅层的方法。 该方法包括以下步骤：在衬底上形成第一层，优选柔性衬底，第一层具有（多）硅烷; 并用200-400nm范围内的一个或多个波长的光照射，以转化硅中的聚硅烷，优选非晶硅或多晶硅。

公开(公告)号：US09514950B2

公开(公告)日：2016-12-06

申请号：US14585247

申请日：2014-12-30

申请人： Canon Nanotechnologies, Inc. ,  Molecular Imprints, Inc.

发明人： Zhengmao Ye ,  Dwayne L. LaBrake

IPC分类号： H01L21/308 ,  H01L21/311 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/3105 ,  H01L21/283 ,  G03F7/00

CPC分类号： H01L21/3086 ,  G03F7/0002 ,  H01L21/02532 ,  H01L21/02623 ,  H01L21/283 ,  H01L21/31058 ,  H01L21/31133 ,  H01L21/31144 ,  H01L21/32051

摘要： Methods of increasing etch selectivity in imprint lithography are described which employ material deposition techniques that impart a unique morphology to the multi-layer material stacks, thereby enhancing etch process window and improving etch selectivity. For example, etch selectivity of 50:1 or more between patterned resist layer and deposited metals, metalloids, or non-organic oxides can be achieved, which greatly preserves the pattern feature height prior to the etch process that transfers the pattern into the substrate, allowing for sub-20 nm pattern transfer at high fidelity.

摘要翻译： 描述了在压印光刻中提高蚀刻选择性的方法，其采用材料沉积技术，其赋予多层材料堆叠独特的形态，从而增强蚀刻工艺窗口并提高蚀刻选择性。 例如，可以实现在图案化的抗蚀剂层和沉积的金属，准金属或非有机氧化物之间的50:1或更大的蚀刻选择性，这大大保持了将图案转移到衬底中的蚀刻工艺之前的图案特征高度， 允许以高保真度进行亚20 nm图案转印。

公开(公告)号：US20160268475A1

公开(公告)日：2016-09-15

申请号：US14644393

申请日：2015-03-11

申请人： International Business Machines Corporation

发明人： William J. Gallagher ,  Effendi Leobandung ,  Devendra K. Sadana ,  Ghavam G. Shahidi

IPC分类号： H01L33/32 ,  H01L33/00 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/762 ,  H01L21/02

CPC分类号： H01L21/02694 ,  H01L21/02002 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02623 ,  H01L21/02631 ,  H01L21/0332 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/31116 ,  H01L21/47573 ,  H01L21/76283 ,  H01L33/0025 ,  H01L33/0066 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/20 ,  H01L33/32

摘要： A method and structure for integrating gallium nitride into a semiconductor substrate. The method may also include means for isolating the gallium nitride from the semiconductor substrate.

公开(公告)号：US09349592B2

公开(公告)日：2016-05-24

申请号：US14460121

申请日：2014-08-14

申请人： SixPoint Materials, Inc. ,  Seoul Semiconductor Co., Ltd.

发明人： Tadao Hashimoto

IPC分类号： H01L21/02 ,  H01L29/207 ,  H01L29/78 ,  H01L29/812 ,  C23C16/30 ,  H01L29/861 ,  H01L29/872 ,  H01L29/20 ,  H01L29/201 ,  H01L29/417 ,  H01L29/06 ,  H01L29/205

CPC分类号： H01L21/0254 ,  C23C16/303 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/02584 ,  H01L21/0262 ,  H01L21/02623 ,  H01L21/02694 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/207 ,  H01L29/32 ,  H01L29/41766 ,  H01L29/66462 ,  H01L29/7784 ,  H01L29/7828 ,  H01L29/8122 ,  H01L29/8611 ,  H01L29/872

摘要： The present invention discloses an electronic device using a group III nitride substrate fabricated via the ammonothermal method. By utilizing the high-electron concentration of ammonothermally grown substrates having the dislocation density less than 105 cm−2, combined with a high-purity active layer of Ga1-x-yAlxInyN (0≦x≦1, 0≦y≦1) grown by a vapor phase method, the device can attain high level of breakdown voltage as well as low on-resistance. To realize a good matching between the ammonothermally grown substrate and the high-purity active layer, a transition layer is optionally introduced. The active layer is thicker than a depletion region created by a device structure in the active layer.

摘要翻译： 本发明公开了一种使用通过氨热法制造的III族氮化物衬底的电子器件。 通过利用具有位错密度小于105cm -2的氨基生长衬底的高电子浓度，与Ga1-x-yAlxInyN（0＆amp; nlE; x＆nlE; 1,0＆amp; nlE; y＆nlE; 1）的高纯度有源层结合生长 通过气相法，器件可以获得高电平的击穿电压以及低导通电阻。 为了实现氨热生长的基底和高纯度活性层之间的良好匹配，任选地引入过渡层。 有源层比由有源层中的器件结构产生的耗尽区厚。

公开(公告)号：US20140094003A1

公开(公告)日：2014-04-03

申请号：US14094677

申请日：2013-12-02

申请人： Jurgen H. Daniel ,  Ana Claudia Arias

发明人： Jurgen H. Daniel ,  Ana Claudia Arias

IPC分类号： H01L29/66

CPC分类号： H01L21/02288 ,  H01L21/02488 ,  H01L21/02521 ,  H01L21/02623 ,  H01L21/02628 ,  H01L21/38 ,  H01L27/1292 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/78684 ,  H01L29/7869 ,  H01L51/0004

摘要： A first patterned contact layer, for example a gate electrode, is formed over an insulative substrate. Insulating and functional layers are formed at least over the first patterned contact layer. A second patterned contact layer, for example source/drain electrodes, is formed over the functional layer. Insulative material is then selectively deposited over at least a portion of the second patterned contact layer to form first and second wall structures such that at least a portion of the second patterned contact layer is exposed, the first and second wall structures defining a well therebetween. Electrically conductive or semiconductive material is deposited within the well, for example by jet-printing, such that the first and second wall structures confine the conductive or semiconductive material and prevent spreading and electrical shorting to adjacent devices. The conductive or semiconductive material is in electrical contact with the exposed portion of the second patterned contact layer to form, e.g., an operative transistor.

摘要翻译： 第一图案化接触层，例如栅电极，形成在绝缘衬底上。 至少在第一图案化接触层上形成绝缘层和功能层。 在功能层上形成第二图案化接触层，例如源/漏电极。 绝缘材料然后选择性地沉积在第二图案化接触层的至少一部分上以形成第一和第二壁结构，使得第二图案化接触层的至少一部分被暴露，第一和第二壁结构在其间限定了一个阱。 导电或半导体材料例如通过喷墨印刷沉积在阱内，使得第一和第二壁结构限制导电或半导体材料并防止相邻器件的扩展和电短路。 导电或半导体材料与第二图案化接触层的暴露部分电接触以形成例如有效晶体管。

公开(公告)号：US08485126B2

公开(公告)日：2013-07-16

申请号：US12874117

申请日：2010-09-01

申请人： Hidenori Miyamoto ,  Kenji Maruyama ,  Tadahiko Hirakawa ,  Koichi Misumi

发明人： Hidenori Miyamoto ,  Kenji Maruyama ,  Tadahiko Hirakawa ,  Koichi Misumi

IPC分类号： B05C11/00 ,  B05C13/00 ,  H01L21/00

CPC分类号： H01L31/0322 ,  B05B16/20 ,  B05B16/60 ,  B05B16/95 ,  H01L21/02568 ,  H01L21/02614 ,  H01L21/02623 ,  Y02E10/541

摘要： A coating apparatus including a coating part which applies a liquid material including an oxidizable metal on a substrate; a chamber having a coating section in which the coating part applies the liquid material on the substrate and a transport section into which the liquid material is transported; an adjusting part which adjusts at least one of oxygen concentration and humidity inside the chamber; and a control part which stops an operation of the coating part in response to the entrance of foreign object into the chamber.

摘要翻译： 一种涂布装置，包括：涂布部，其在基材上涂布包含可氧化金属的液体材料; 具有涂布部的室，其中所述涂布部将所述液体材料施加到所述基板上;以及运送部，所述液体材料被输送到所述输送部中; 调节部，其调节所述室内的氧浓度和湿度中的至少一个; 以及控制部，其响应于异物进入室而停止涂布部的操作。