公开(公告)号：US20250159936A1

公开(公告)日：2025-05-15

申请号：US19013412

申请日：2025-01-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro SATO ,  Yasutaka NAKAZAWA ,  Takayuki CHO ,  Shunsuke KOSHIOKA ,  Hajime TOKUNAGA ,  Masami JINTYOU

IPC: H10D30/67 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/02 ,  H01L21/306 ,  H01L21/465 ,  H10D30/01 ,  H10D62/10 ,  H10D62/17 ,  H10D62/40 ,  H10D62/80 ,  H10D64/27 ,  H10D86/01 ,  H10D86/40 ,  H10D86/60 ,  H10D99/00 ,  H10K59/123

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US20180374957A1

公开(公告)日：2018-12-27

申请号：US16110488

申请日：2018-08-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masahiro KATAYAMA ,  Yasutaka NAKAZAWA ,  Masatoshi YOKOYAMA ,  Masahiko HAYAKAWA ,  Kenichi OKAZAKI ,  Shunsuke KOSHIOKA

IPC: H01L29/786 ,  H01L27/12 ,  G09G3/20 ,  G09G5/00 ,  G06F3/041 ,  G09G3/36

Abstract: A semiconductor device including a transistor and a wiring electrically connected to the transistor each of which has excellent electrical characteristics because of specific structures thereover is provided. A first conductive film, a first insulating film over the first conductive film, a second conductive film over the first insulating film, a second insulating film over the second conductive film, a third conductive film electrically connected to the first conductive film through an opening provided in the first insulating film and the second insulating film, and a third insulating film over the third conductive film are provided. The third conductive film includes indium, tin, and oxygen, and the third insulating film includes silicon and nitrogen and the number of ammonia molecules released from the third insulating film is less than or equal to 1×1015 molecules/cm3 by thermal desorption spectroscopy.

公开(公告)号：US20150108473A1

公开(公告)日：2015-04-23

申请号：US14518362

申请日：2014-10-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasutaka NAKAZAWA ,  Shunsuke KOSHIOKA ,  Takayuki CHO ,  Takahiro SATO

IPC: H01L29/786 ,  H01L29/66 ,  C09K13/00 ,  H01L21/441 ,  H01L21/02 ,  H01L21/4763 ,  H01L29/45

CPC classification number: H01L29/7869 ,  C09K13/00 ,  C23F1/02 ,  C23F1/18 ,  C23F1/26 ,  H01L21/32134 ,  H01L21/47635 ,  H01L23/53238 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for manufacturing a semiconductor device includes the steps of forming a first conductive film over a substrate; forming an insulating film over the first conductive film; forming an oxide semiconductor film over the insulating film to overlap with the first conductive film; forming a second conductive film including a metal film containing molybdenum as its main component and a metal film containing copper as its main component over the oxide semiconductor film; and etching the second conductive film by an etchant. At the time of etching the second conductive film by the etchant, the oxide semiconductor film is used as an etching stopper film. In addition, the etchant which can be used for a transistor including the oxide semiconductor film is provided.

Abstract translation: 一种制造半导体器件的方法包括以下步骤：在衬底上形成第一导电膜; 在所述第一导电膜上形成绝缘膜; 在所述绝缘膜上形成氧化物半导体膜以与所述第一导电膜重叠; 在所述氧化物半导体膜上形成包含以钼为主成分的金属膜和含有铜作为主要成分的金属膜的第二导电膜; 并用蚀刻剂蚀刻第二导电膜。 在通过蚀刻剂蚀刻第二导电膜时，氧化物半导体膜用作蚀刻停止膜。 此外，提供了可用于包括氧化物半导体膜的晶体管的蚀刻剂。

公开(公告)号：US20130099232A1

公开(公告)日：2013-04-25

申请号：US13652686

申请日：2012-10-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takayuki CHO ,  Shunsuke KOSHIOKA ,  Masatoshi YOKOYAMA ,  Shunpei YAMAZAKI

IPC: H01L29/786

CPC classification number: H01L29/78693 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

Abstract: To provide a highly reliable semiconductor device which includes a transistor including an oxide semiconductor, in a semiconductor device including a staggered transistor having a bottom-gate structure provided over a glass substrate, a gate insulating film in which a first gate insulating film and a second gate insulating film, whose compositions are different from each other, are stacked in this order is provided over a gate electrode layer. Alternatively, in a staggered transistor having a bottom-gate structure, a protective insulating film is provided between a glass substrate and a gate electrode layer. A metal element contained in the glass substrate has a concentration lower than or equal to 5×1018 atoms/cm3 (preferably, lower than or equal to 1×1018 atoms/cm3) at the interface between the first gate insulating film and the second gate insulating film or the interface between the gate electrode layer and a gate insulating film.

Abstract translation: 为了提供一种高可靠性的半导体器件，其包括具有氧化物半导体的晶体管，在包括设置在玻璃基板上的具有底栅结构的交错晶体管的半导体器件中，栅极绝缘膜，其中第一栅极绝缘膜和第二栅极绝缘膜 其栅极绝缘膜的组成彼此不同，按栅极电极层设置。 或者，在具有底栅结构的交错晶体管中，在玻璃基板和栅电极层之间设置保护绝缘膜。 包含在玻璃基板中的金属元素在第一栅极绝缘膜和第二栅极之间的界面处具有低于或等于5×1018原子/ cm3（优选低于或等于1×1018原子/ cm3）的浓度 绝缘膜或栅极电极层与栅极绝缘膜之间的界面。

公开(公告)号：US20210020785A1

公开(公告)日：2021-01-21

申请号：US17063748

申请日：2020-10-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro SATO ,  Yasutaka NAKAZAWA ,  Takayuki CHO ,  Shunsuke KOSHIOKA ,  Hajime TOKUNAGA ,  Masami JINTYOU

IPC: H01L29/786 ,  H01L29/10 ,  H01L21/02 ,  H01L21/465 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/32 ,  H01L29/04 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L21/306 ,  H01L29/66

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US20180053856A1

公开(公告)日：2018-02-22

申请号：US15785562

申请日：2017-10-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro SATO ,  Yasutaka NAKAZAWA ,  Takayuki CHO ,  Shunsuke KOSHIOKA ,  Hajime TOKUNAGA ,  Masami JINTYOU

IPC: H01L29/786 ,  H01L21/02 ,  H01L27/32 ,  H01L29/10 ,  H01L21/465 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/66 ,  H01L29/06 ,  H01L29/24 ,  G02F1/1362 ,  H01L29/423 ,  H01L29/04 ,  H01L21/306

CPC classification number: H01L29/78696 ,  G02F1/136277 ,  G02F1/1368 ,  H01L21/02365 ,  H01L21/02403 ,  H01L21/02422 ,  H01L21/02551 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/30604 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/3248 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/7869 ,  H01L29/78693

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US20140138674A1

公开(公告)日：2014-05-22

申请号：US14073993

申请日：2013-11-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro SATO ,  Yasutaka NAKAZAWA ,  Takayuki CHO ,  Shunsuke KOSHIOKA ,  Hajime TOKUNAGA ,  Masami JINTYOU

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  G02F1/136277 ,  G02F1/1368 ,  H01L21/02365 ,  H01L21/02403 ,  H01L21/02422 ,  H01L21/02551 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/30604 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/3248 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78693 ,  H01L29/78696

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

Abstract translation: 晶体管包括层叠有氧化物半导体膜和氧化膜的多层膜，栅极电极和栅极绝缘膜。 多层膜与栅电极重叠，栅极绝缘膜插入其间。 多层膜具有在氧化物半导体膜的底面和氧化物半导体膜的侧面之间具有第一角度的形状，以及氧化物膜的底面与氧化膜的侧面之间的第二角度。 第一个角度是锐角并小于第二个角度。 此外，制造包括这种晶体管的半导体器件。

公开(公告)号：US20230317857A1

公开(公告)日：2023-10-05

申请号：US18207176

申请日：2023-06-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro SATO ,  Yasutaka NAKAZAWA ,  Takayuki CHO ,  Shunsuke KOSHIOKA ,  Hajime TOKUNAGA ,  Masami JINTYOU

IPC: H01L29/786 ,  H01L29/10 ,  H01L21/02 ,  H01L21/465 ,  H10K59/123 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/04 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L21/306 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/1033 ,  H01L29/786 ,  H01L21/02551 ,  H01L21/02554 ,  H01L29/78693 ,  H01L21/02422 ,  H01L21/02631 ,  H01L21/465 ,  H01L29/78603 ,  H10K59/123 ,  H01L29/78696 ,  G02F1/136277 ,  G02F1/1368 ,  H01L21/02365 ,  H01L21/02403 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/24 ,  H01L29/42356 ,  H01L21/02565 ,  H01L21/30604 ,  H01L27/1259 ,  H01L29/66742 ,  H01L29/66969

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US20170301860A1

公开(公告)日：2017-10-19

申请号：US15483618

申请日：2017-04-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Takahiro SATO ,  Shunsuke KOSHIOKA ,  Rihito WADA ,  Junko SUZAWA

IPC: H01L51/00 ,  H01L27/32 ,  H01L51/56 ,  H01L51/52 ,  H01L29/786

CPC classification number: H01L51/003 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/7869 ,  H01L51/0097 ,  H01L51/5237 ,  H01L51/56 ,  H01L2227/323 ,  H01L2227/326 ,  H01L2251/5338 ,  Y02E10/549

Abstract: To provide a highly flexible display device excellent in mass-productivity. A display device includes a flexible substrate, an adhesive layer over the substrate, a resin layer over the adhesive layer, an inorganic insulating layer over the resin layer, a transistor over the inorganic insulating layer, and a display element electrically connected to the transistor. The transistor includes an oxide semiconductor in a channel formation region. The resin layer includes sulfur.

公开(公告)号：US20160293641A1

公开(公告)日：2016-10-06

申请号：US15187106

申请日：2016-06-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro SATO ,  Yasutaka NAKAZAWA ,  Takayuki CHO ,  Shunsuke KOSHIOKA ,  Hajime TOKUNAGA ,  Masami JINTYOU

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1362 ,  H01L29/66 ,  G02F1/1368 ,  H01L27/32 ,  H01L29/04

CPC classification number: H01L29/7869 ,  G02F1/136277 ,  G02F1/1368 ,  H01L21/02365 ,  H01L21/02403 ,  H01L21/02422 ,  H01L21/02551 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/30604 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/3248 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78693 ,  H01L29/78696

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.