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公开(公告)号:US08501636B1
公开(公告)日:2013-08-06
申请号:US13556247
申请日:2012-07-24
申请人: Shao-Wei Wang , Yu-Ren Wang , Chien-Liang Lin , Ying-Wei Yen , Kun-Yuan Lo , Chih-Wei Yang
发明人: Shao-Wei Wang , Yu-Ren Wang , Chien-Liang Lin , Ying-Wei Yen , Kun-Yuan Lo , Chih-Wei Yang
IPC分类号: H01L21/31 , H01L21/469
CPC分类号: H01L21/02052 , H01L21/02238 , H01L21/02255 , H01L21/02337 , H01L21/28167 , H01L21/28185 , H01L21/28202 , H01L21/28211 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/66545
摘要: A method for fabricating silicon dioxide layer is disclosed. The method includes the following steps. Firstly, a semiconductor substrate is provided. Next, the semiconductor substrate is cleaned with a solution containing hydrogen peroxide to form a chemical oxide layer on the semiconductor substrate. Then, the chemical oxide layer is heated in no oxygen atmosphere, such that the chemical oxide layer forms a compact layer. Then, the semiconductor substrate is heated in oxygen atmosphere to form a silicon dioxide layer between the semiconductor substrate and the compact layer.
摘要翻译: 公开了制造二氧化硅层的方法。 该方法包括以下步骤。 首先,提供半导体衬底。 接下来,用含有过氧化氢的溶液清洗半导体衬底,以在半导体衬底上形成化学氧化物层。 然后,化学氧化物层在无氧气氛中加热,使得化学氧化物层形成致密层。 然后,在氧气氛中加热半导体衬底,以在半导体衬底和致密层之间形成二氧化硅层。
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公开(公告)号:US08802579B2
公开(公告)日:2014-08-12
申请号:US13271256
申请日:2011-10-12
申请人: Chien-Liang Lin , Shao-Wei Wang , Yu-Ren Wang , Ying-Wei Yen
发明人: Chien-Liang Lin , Shao-Wei Wang , Yu-Ren Wang , Ying-Wei Yen
CPC分类号: H01L21/02181 , H01L21/0228 , H01L21/02332 , H01L21/02337 , H01L21/0234 , H01L21/28185 , H01L21/28194 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/66545
摘要: A semiconductor process includes the following steps. A substrate is provided. A dielectric layer having a high dielectric constant is formed on the substrate, wherein the steps of forming the dielectric layer include: (a) a metallic oxide layer is formed; (b) an annealing process is performed to the metallic oxide layer; and the steps (a) and (b) are performed repeatedly. Otherwise, the present invention further provides a semiconductor structure formed by said semiconductor process.
摘要翻译: 半导体工艺包括以下步骤。 提供基板。 在基板上形成具有高介电常数的介电层,其中形成电介质层的步骤包括:(a)形成金属氧化物层; (b)对金属氧化物层进行退火处理; 并重复执行步骤(a)和(b)。 另外,本发明还提供了由所述半导体工艺形成的半导体结构。
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公开(公告)号:US20130093064A1
公开(公告)日:2013-04-18
申请号:US13271256
申请日:2011-10-12
申请人: Chien-Liang Lin , Shao-Wei Wang , Yu-Ren Wang , Ying-Wei Yen
发明人: Chien-Liang Lin , Shao-Wei Wang , Yu-Ren Wang , Ying-Wei Yen
CPC分类号: H01L21/02181 , H01L21/0228 , H01L21/02332 , H01L21/02337 , H01L21/0234 , H01L21/28185 , H01L21/28194 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/66545
摘要: A semiconductor process includes the following steps. A substrate is provided. A dielectric layer having a high dielectric constant is formed on the substrate, wherein the steps of forming the dielectric layer include: (a) a metallic oxide layer is formed; (b) an annealing process is performed to the metallic oxide layer; and the steps (a) and (b) are performed repeatedly. Otherwise, the present invention further provides a semiconductor structure formed by said semiconductor process.
摘要翻译: 半导体工艺包括以下步骤。 提供基板。 在基板上形成具有高介电常数的介电层,其中形成电介质层的步骤包括:(a)形成金属氧化物层; (b)对金属氧化物层进行退火处理; 并重复执行步骤(a)和(b)。 另外,本发明还提供了由所述半导体工艺形成的半导体结构。
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公开(公告)号:US20120264284A1
公开(公告)日:2012-10-18
申请号:US13086410
申请日:2011-04-14
申请人: Shao-Wei Wang , Ying-Wei Yen , Yu-Ren Wang , Chien-Liang Lin
发明人: Shao-Wei Wang , Ying-Wei Yen , Yu-Ren Wang , Chien-Liang Lin
IPC分类号: H01L21/28
CPC分类号: H01L29/66545 , H01L21/28088 , H01L29/165 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6659 , H01L29/66636 , H01L29/7833 , H01L29/7848
摘要: A manufacturing method for a metal gate structure includes providing a substrate having a gate trench formed thereon, forming a work function metal layer in the gate trench, and performing an annealing process to the work function metal layer. The annealing process is performed at a temperature between 400° C. and 500° C., and in a bout 20 seconds to about 180 seconds.
摘要翻译: 金属栅极结构的制造方法包括提供其上形成有栅极沟槽的衬底,在栅极沟槽中形成功函数金属层,并对功函数金属层进行退火处理。 退火过程在400℃和500℃之间的温度下进行,并且在20秒至约180秒的温度下进行。
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公开(公告)号:US20120329261A1
公开(公告)日:2012-12-27
申请号:US13164781
申请日:2011-06-21
申请人: Shao-Wei Wang , Yu-Ren Wang , Chien-Liang Lin , Wen-Yi Teng , Tsuo-Wen Lu , Chih-Chung Chen , Ying-Wei Yen , Yu-Min Lin , Chin-Cheng Chien , Jei-Ming Chen , Chun-Wei Hsu , Chia-Lung Chang , Yi-Ching Wu , Shu-Yen Chan
发明人: Shao-Wei Wang , Yu-Ren Wang , Chien-Liang Lin , Wen-Yi Teng , Tsuo-Wen Lu , Chih-Chung Chen , Ying-Wei Yen , Yu-Min Lin , Chin-Cheng Chien , Jei-Ming Chen , Chun-Wei Hsu , Chia-Lung Chang , Yi-Ching Wu , Shu-Yen Chan
IPC分类号: H01L21/782 , H01L21/28
CPC分类号: H01L29/7833 , H01L21/265 , H01L21/3215 , H01L21/823842 , H01L29/4966 , H01L29/517 , H01L29/665 , H01L29/66545 , H01L29/6659
摘要: A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.
摘要翻译: 一种金属栅极的制造方法,包括提供具有至少形成有导电类型的半导体器件的衬底,在该半导体器件中形成栅极沟槽,形成具有导电类型的功函数金属层和对应于 栅极沟槽中的导电类型,并且执行离子注入以将功函数金属层的固有功函数调整到目标功函数。
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公开(公告)号:US08426277B2
公开(公告)日:2013-04-23
申请号:US13241232
申请日:2011-09-23
申请人: Chien-Liang Lin , Shih-Hung Tsai , Chun-Hsien Lin , Te-Lin Sun , Shao-Wei Wang , Ying-Wei Yen , Yu-Ren Wang
发明人: Chien-Liang Lin , Shih-Hung Tsai , Chun-Hsien Lin , Te-Lin Sun , Shao-Wei Wang , Ying-Wei Yen , Yu-Ren Wang
IPC分类号: H01L21/336 , H01L21/8238
CPC分类号: H01L21/3247 , H01L29/66795 , H01L29/7854
摘要: A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate and an oxide layer is formed on the substrate without the fin-shaped structure forming thereon. A thermal treatment process is performed to form a melting layer on at least a part of the sidewall of the fin-shaped structure.
摘要翻译: 半导体工艺包括以下步骤。 提供基板。 至少在基板上形成翅片状结构,在基板上形成氧化层,而不形成翅片状结构。 进行热处理工艺以在鳍状结构的侧壁的至少一部分上形成熔融层。
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公开(公告)号:US20120309171A1
公开(公告)日:2012-12-06
申请号:US13118473
申请日:2011-05-30
申请人: Tsuo-Wen Lu , Wen-Yi Teng , Yu-Ren Wang , Gin-Chen Huang , Chien-Liang Lin , Shao-Wei Wang , Ying-Wei Yen , Ya-Chi Cheng , Shu-Yen Chan , Chan-Lon Yang
发明人: Tsuo-Wen Lu , Wen-Yi Teng , Yu-Ren Wang , Gin-Chen Huang , Chien-Liang Lin , Shao-Wei Wang , Ying-Wei Yen , Ya-Chi Cheng , Shu-Yen Chan , Chan-Lon Yang
IPC分类号: H01L21/20
CPC分类号: H01L29/6656 , H01L29/165 , H01L29/66636 , H01L29/7834 , H01L29/7848
摘要: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate, wherein the substrate comprises a gate structure thereon; forming a film stack on the substrate and covering the gate structure, wherein the film stack comprises at least an oxide layer and a nitride layer; removing a portion of the film stack for forming recesses adjacent to two sides of the gate structure and a disposable spacer on the sidewall of the gate structure; and filling the recesses with a material comprising silicon atoms for forming a faceted material layer.
摘要翻译: 公开了半导体器件的制造方法。 该方法包括以下步骤:提供衬底,其中衬底包括其上的栅极结构; 在所述衬底上形成膜叠层并覆盖所述栅极结构,其中所述膜堆叠至少包括氧化物层和氮化物层; 移除所述薄膜叠层的一部分以形成邻近所述栅极结构的两侧的凹槽和所述栅极结构侧壁上的一次性间隔物; 并用包含硅原子的材料填充凹部,以形成刻面材料层。
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公开(公告)号:US08921238B2
公开(公告)日:2014-12-30
申请号:US13235515
申请日:2011-09-19
申请人: Shao-Wei Wang , Yu-Ren Wang , Chien-Liang Lin , Wen-Yi Teng , Tsuo-Wen Lu , Chih-Chung Chen , Ying-Wei Yen
发明人: Shao-Wei Wang , Yu-Ren Wang , Chien-Liang Lin , Wen-Yi Teng , Tsuo-Wen Lu , Chih-Chung Chen , Ying-Wei Yen
IPC分类号: H01L21/31 , H01L21/3105 , H01L21/02
CPC分类号: H01L21/3105 , H01L21/02148 , H01L21/02178 , H01L21/02181 , H01L21/02183 , H01L21/02192 , H01L21/02197 , H01L21/0228
摘要: A method for processing a high-k dielectric layer includes the following steps. A semiconductor substrate is provided, and a high-k dielectric layer is formed thereon. The high-k dielectric layer has a crystalline temperature. Subsequently, a first annealing process is performed, and a process temperature of the first annealing process is substantially smaller than the crystalline temperature. A second annealing process is performed, and a process temperature of the second annealing process is substantially larger than the crystalline temperature.
摘要翻译: 一种用于处理高k电介质层的方法包括以下步骤。 提供半导体衬底,并且在其上形成高k电介质层。 高k电介质层具有结晶温度。 随后,进行第一退火处理,并且第一退火工艺的处理温度显着小于结晶温度。 进行第二退火处理,第二退火处理的工艺温度显着大于结晶温度。
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公开(公告)号:US08536038B2
公开(公告)日:2013-09-17
申请号:US13164781
申请日:2011-06-21
申请人: Shao-Wei Wang , Yu-Ren Wang , Chien-Liang Lin , Wen-Yi Teng , Tsuo-Wen Lu , Chih-Chung Chen , Ying-Wei Yen , Yu-Min Lin , Chin-Cheng Chien , Jei-Ming Chen , Chun-Wei Hsu , Chia-Lung Chang , Yi-Ching Wu , Shu-Yen Chan
发明人: Shao-Wei Wang , Yu-Ren Wang , Chien-Liang Lin , Wen-Yi Teng , Tsuo-Wen Lu , Chih-Chung Chen , Ying-Wei Yen , Yu-Min Lin , Chin-Cheng Chien , Jei-Ming Chen , Chun-Wei Hsu , Chia-Lung Chang , Yi-Ching Wu , Shu-Yen Chan
IPC分类号: H01L21/3205 , H01L21/425
CPC分类号: H01L29/7833 , H01L21/265 , H01L21/3215 , H01L21/823842 , H01L29/4966 , H01L29/517 , H01L29/665 , H01L29/66545 , H01L29/6659
摘要: A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.
摘要翻译: 一种金属栅极的制造方法,包括提供具有至少形成有导电类型的半导体器件的衬底,在该半导体器件中形成栅极沟槽,形成具有导电类型的功函数金属层和对应于 栅极沟槽中的导电类型,并且执行离子注入以将功函数金属层的固有功函数调整到目标功函数。
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公开(公告)号:US20130078818A1
公开(公告)日:2013-03-28
申请号:US13241232
申请日:2011-09-23
申请人: Chien-Liang Lin , Shih-Hung Tsai , Chun-Hsien Lin , Te-Lin Sun , Shao-Wei Wang , Ying-Wei Yen , Yu-Ren Wang
发明人: Chien-Liang Lin , Shih-Hung Tsai , Chun-Hsien Lin , Te-Lin Sun , Shao-Wei Wang , Ying-Wei Yen , Yu-Ren Wang
IPC分类号: H01L21/31
CPC分类号: H01L21/3247 , H01L29/66795 , H01L29/7854
摘要: A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate and an oxide layer is formed on the substrate without the fin-shaped structure forming thereon. A thermal treatment process is performed to form a melting layer on at least a part of the sidewall of the fin-shaped structure.
摘要翻译: 半导体工艺包括以下步骤。 提供基板。 至少在基板上形成翅片状结构,在基板上形成氧化层,而不形成翅片状结构。 进行热处理工艺以在鳍状结构的侧壁的至少一部分上形成熔融层。
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