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公开(公告)号:US20120276694A1
公开(公告)日:2012-11-01
申请号:US13453118
申请日:2012-04-23
申请人: Junichi KOEZUKA , Naoto YAMADE , Yuhei SATO , Yutaka OKAZAKI , Shunpei YAMAZAKI
发明人: Junichi KOEZUKA , Naoto YAMADE , Yuhei SATO , Yutaka OKAZAKI , Shunpei YAMAZAKI
IPC分类号: H01L21/336
CPC分类号: H01L27/1274 , H01L21/02565 , H01L21/02609 , H01L21/02667 , H01L21/383 , H01L21/44 , H01L21/477 , H01L27/1225 , H01L29/66742 , H01L29/66969 , H01L29/78606 , H01L29/7869 , H01L29/78696
摘要: A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.
摘要翻译: 使用氧化物半导体的半导体器件具有稳定的电特性以提高可靠性。 在包括氧化物半导体膜的晶体管的制造工艺中,形成含有基本上垂直于其顶表面的c轴的晶体(也称为第一晶体氧化物半导体膜)的氧化物半导体膜; 氧化物被添加到氧化物半导体膜中以使至少部分氧化物半导体膜非晶化,从而形成含有过量氧的非晶氧化物半导体膜; 在非晶氧化物半导体膜上形成氧化铝膜; 在其上进行热处理以使非晶氧化物半导体膜的至少一部分结晶,使得含有具有基本上垂直于其顶表面的c轴的晶体的氧化物半导体膜(也称为第二结晶氧化物半导体膜 ) 形成了。
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公开(公告)号:US20130069055A1
公开(公告)日:2013-03-21
申请号:US13608044
申请日:2012-09-10
申请人: Shunpei YAMAZAKI , Atsuo ISOBE , Hiromachi GODO , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Naoto YAMADE , Junichi KOEZUKA
发明人: Shunpei YAMAZAKI , Atsuo ISOBE , Hiromachi GODO , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Naoto YAMADE , Junichi KOEZUKA
IPC分类号: H01L29/78
CPC分类号: H01L29/41733 , H01L29/78618 , H01L29/7869 , H01L29/78693
摘要: Provided is a semiconductor device in which an oxide semiconductor layer is provided; a pair of wiring layers which are provided with the gate electrode layer interposed therebetween are electrically connected to the low-resistance regions; and electrode layers are provided to be in contact with the low-resistance regions, below regions where the wiring layers are formed.
摘要翻译: 提供一种半导体器件,其中提供氧化物半导体层; 设置有栅极电极层的一对布线层电连接到低电阻区域; 并且电极层设置成与低电阻区域接触,在形成布线层的区域之下。
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公开(公告)号:US20130020569A1
公开(公告)日:2013-01-24
申请号:US13547119
申请日:2012-07-12
申请人: Shunpei YAMAZAKI , Naoto YAMADE , Junichi KOEZUKA
发明人: Shunpei YAMAZAKI , Naoto YAMADE , Junichi KOEZUKA
IPC分类号: H01L29/12
CPC分类号: H01L27/1225
摘要: A semiconductor device which can operate at high speed and consumes a smaller amount of power is provided. In a semiconductor device including transistors each including an oxide semiconductor, the oxygen concentration of the oxide semiconductor film of the transistor having small current at negative gate voltage is different from that of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current. Typically, the oxygen concentration of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current is lower than that of the oxide semiconductor film of the transistor having small current at negative gate voltage.
摘要翻译: 提供了可以高速运行并消耗更少功率的半导体器件。 在包括各自包含氧化物半导体的晶体管的半导体器件中,在负栅极电压下具有小电流的晶体管的氧化物半导体膜的氧浓度与具有高场效应迁移率的晶体管的氧化物半导体膜的氧浓度不同 通态电流。 通常,具有高场电迁移率和大导通状态电流的晶体管的氧化物半导体膜的氧浓度低于在负栅极电压下具有小电流的晶体管的氧化物半导体膜的氧浓度。
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公开(公告)号:US20100201655A1
公开(公告)日:2010-08-12
申请号:US12761611
申请日:2010-04-16
申请人: Shunpei YAMAZAKI , Osamu NAKAMURA , Aki YAMAMITI , Naoto YAMADE
发明人: Shunpei YAMAZAKI , Osamu NAKAMURA , Aki YAMAMITI , Naoto YAMADE
CPC分类号: H01L27/1259 , H01L27/1214 , H01L27/3244 , H01L27/3246 , H01L27/3258 , H01L27/3272 , H01L51/5206 , H01L51/524 , H01L51/5253 , H01L51/5284 , H01L2251/5323 , H01L2251/552
摘要: A display device with improved reliability and a manufacturing method of the same with improved yield. A display device according to the invention comprises a display area including a first electrode, an insulating layer covering an edge of the first electrode, a layer containing an organic compound, which is formed on the first electrode, and a second electrode. The first electrode and the insulating layer are doped with an impurity element of one conductivity.
摘要翻译: 一种可靠性提高的显示装置及其制造方法,其产率提高。 根据本发明的显示装置包括显示区域,包括第一电极,覆盖第一电极的边缘的绝缘层,形成在第一电极上的含有机化合物的层和第二电极。 第一电极和绝缘层掺杂有一种导电性的杂质元素。
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公开(公告)号:US20140139775A1
公开(公告)日:2014-05-22
申请号:US14077390
申请日:2013-11-12
申请人: Hiroyuki MIYAKE , Shunpei YAMAZAKI , Yoshifumi TANADA , Manabu SATO , Toshinari SASAKI , Kenichi OKAZAKI , Junichi KOEZUKA , Takuya MATSUO , Hiroshi MATSUKIZONO , Yosuke KANZAKI , Shigeyasu MORI
发明人: Hiroyuki MIYAKE , Shunpei YAMAZAKI , Yoshifumi TANADA , Manabu SATO , Toshinari SASAKI , Kenichi OKAZAKI , Junichi KOEZUKA , Takuya MATSUO , Hiroshi MATSUKIZONO , Yosuke KANZAKI , Shigeyasu MORI
IPC分类号: G02F1/1368 , H01L27/12
CPC分类号: H01L27/1225 , H01L27/124 , H01L29/78648
摘要: A semiconductor device includes: a transistor including a gate electrode, a gate insulating film over the gate electrode, a semiconductor layer over the gate insulating film, and a source electrode and a drain electrode over the semiconductor layer; a first insulating film comprising an inorganic material over the transistor; a second insulating film comprising an organic material over the first insulating film; a first conductive film over the second insulating film and in a region overlapping with the semiconductor layer; a third insulating film comprising an inorganic material over the first conductive film; and a second conductive film over the third insulating film and in a region overlapping with the first conductive film. The absolute value of a first potential applied to the first conductive film is greater than the absolute value of a second potential applied to the second conductive film.
摘要翻译: 半导体器件包括:晶体管,包括栅极电极,栅极上的栅极绝缘膜,栅极绝缘膜上的半导体层,以及半导体层上的源极和漏极; 包括晶体管上的无机材料的第一绝缘膜; 包括在所述第一绝缘膜上的有机材料的第二绝缘膜; 在所述第二绝缘膜上并且在与所述半导体层重叠的区域中的第一导电膜; 在所述第一导电膜上包括无机材料的第三绝缘膜; 以及在所述第三绝缘膜上并且在与所述第一导电膜重叠的区域中的第二导电膜。 施加到第一导电膜的第一电位的绝对值大于施加到第二导电膜的第二电位的绝对值。
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公开(公告)号:US20120164817A1
公开(公告)日:2012-06-28
申请号:US13411864
申请日:2012-03-05
IPC分类号: H01L21/46
CPC分类号: H01L27/1266 , H01L21/76254 , H01L27/1214 , H01L29/66772
摘要: The present invention provides a method for manufacturing an SOI substrate, to improve planarity of a surface of a single crystal semiconductor layer after separation by favorably separating a single crystal semiconductor substrate even in the case where a non-mass-separation type ion irradiation method is used, and to improve planarity of a surface of a single crystal semiconductor layer after separation as well as to improve throughput. The method includes the steps of irradiating a single crystal semiconductor substrate with accelerated ions by an ion doping method while the single crystal semiconductor substrate is cooled to form an embrittled region in the single crystal semiconductor substrate; bonding the single crystal semiconductor substrate and a base substrate with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate along the embrittled region to form a single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween.
摘要翻译: 本发明提供一种制造SOI衬底的方法,即使在非质量分离型离子照射方法为非质子分离型离子照射方法的情况下,通过有利地分离单晶半导体衬底来提高分离后的单晶半导体层的表面的平面性 并且在分离之后提高单晶半导体层的表面的平面性以及提高生产量。 该方法包括以下步骤:当单晶半导体衬底被冷却以在单晶半导体衬底中形成脆化区域时,通过离子掺杂方法照射具有加速离子的单晶半导体衬底; 将单晶半导体衬底和基底衬底之间插入绝缘层; 并且沿着脆化区域分离单晶半导体衬底,以在基底衬底上形成绝缘层,形成单晶半导体层。
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公开(公告)号:US20100117073A1
公开(公告)日:2010-05-13
申请号:US12612021
申请日:2009-11-04
申请人: Shunpei YAMAZAKI , Junichiro SAKATA , Tetsunori MARUYAMA , Yuki IMOTO , Yuji ASANO , Junichi KOEZUKA
发明人: Shunpei YAMAZAKI , Junichiro SAKATA , Tetsunori MARUYAMA , Yuki IMOTO , Yuji ASANO , Junichi KOEZUKA
IPC分类号: H01L29/786 , H01L21/34
CPC分类号: H01L29/66742 , C04B35/58 , C04B2235/3284 , C04B2235/3286 , H01L27/1225 , H01L29/66969 , H01L29/78618 , H01L29/7869
摘要: In a thin film transistor which uses an oxide semiconductor, buffer layers containing indium, gallium, zinc, oxygen, and nitrogen are provided between the oxide semiconductor layer and the source and drain electrode layers.
摘要翻译: 在使用氧化物半导体的薄膜晶体管中,在氧化物半导体层和源极和漏极电极层之间设置包含铟,镓,锌,氧和氮的缓冲层。
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公开(公告)号:US20120315735A1
公开(公告)日:2012-12-13
申请号:US13482398
申请日:2012-05-29
申请人: Junichi KOEZUKA , Shinji OHNO , Yuichi SATO , Shunpei YAMAZAKI
发明人: Junichi KOEZUKA , Shinji OHNO , Yuichi SATO , Shunpei YAMAZAKI
IPC分类号: H01L21/336
CPC分类号: H01L29/7869
摘要: A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. In a manufacturing method of the transistor including the oxide semiconductor film including a channel formation region, an insulating film including a metal element is formed over the oxide semiconductor film, and low-resistance regions in which a dopant added through the insulating film by an implantation method is included are formed in the oxide semiconductor film. The channel formation region is positioned between the low-resistance regions in the channel length direction.
摘要翻译: 提供了具有良好的导通状态特性的使用氧化物半导体的晶体管。 提供了包括能够进行高速响应和高速运行的晶体管的高性能半导体器件。 在包括具有沟道形成区域的氧化物半导体膜的晶体管的制造方法中,在氧化物半导体膜上形成包含金属元素的绝缘膜,以及通过注入在绝缘膜上添加的掺杂剂的低电阻区域 包含的方法形成在氧化物半导体膜中。 沟道形成区域位于沟道长度方向的低电阻区域之间。
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公开(公告)号:US20120315730A1
公开(公告)日:2012-12-13
申请号:US13484670
申请日:2012-05-31
申请人: Junichi KOEZUKA , Shinji OHNO , Yuichi SATO , Shunpei YAMAZAKI
发明人: Junichi KOEZUKA , Shinji OHNO , Yuichi SATO , Shunpei YAMAZAKI
IPC分类号: H01L21/336
CPC分类号: H01L29/7869 , H01L29/24 , H01L29/4908 , H01L29/495 , H01L29/66969 , H01L29/78603 , H01L29/78618
摘要: A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed.
摘要翻译: 提供了具有良好的导通状态特性的使用氧化物半导体的晶体管。 提供了包括能够进行高速响应和高速运行的晶体管的高性能半导体器件。 晶体管包括包括沟道形成区域的氧化物半导体膜和包含金属元素和掺杂剂的低电阻区域。 沟道形成区域位于沟道长度方向的低电阻区域之间。 在晶体管的制造方法中,通过在氧化物半导体膜与包含金属元素的膜接触的状态下进行的热处理来添加金属元素,并且通过植入通过包含金属元素的膜添加掺杂剂 形成包含金属元素和掺杂剂的低电阻区域。
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公开(公告)号:US20120286270A1
公开(公告)日:2012-11-15
申请号:US13463092
申请日:2012-05-03
IPC分类号: H01L29/786 , H01L21/336
CPC分类号: H01L29/4238 , H01L21/02565 , H01L21/265 , H01L21/425 , H01L21/84 , H01L27/1085 , H01L27/10876 , H01L27/1156 , H01L27/1203 , H01L27/1225 , H01L28/40 , H01L29/045 , H01L29/0847 , H01L29/66477 , H01L29/66742 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L29/78693
摘要: It is an object to provide a semiconductor device in which a short-channel effect is suppressed and miniaturization is achieved, and a manufacturing method thereof. A trench is formed in an insulating layer and impurities are added to an oxide semiconductor film in contact with an upper end corner portion of the trench, whereby a source region and a drain region are formed. With the above structure, miniaturization can be achieved. Further, with the trench, a short-channel effect can be suppressed setting the depth of the trench as appropriate even when a distance between a source electrode layer and a drain electrode layer is shortened.
摘要翻译: 本发明的目的是提供一种抑制短路效应并实现小型化的半导体器件及其制造方法。 在绝缘层中形成沟槽,并且将杂质添加到与沟槽的上端角部接触的氧化物半导体膜,由此形成源极区域和漏极区域。 利用上述结构,可以实现小型化。 此外,利用沟槽,即使当源电极层和漏电极层之间的距离缩短时,也可以适当地抑制沟槽的深度适当地设定短沟道效应。
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